diff options
Diffstat (limited to 'src/mainboard/foxconn')
-rw-r--r-- | src/mainboard/foxconn/d41s/romstage.c | 3 | ||||
-rw-r--r-- | src/mainboard/foxconn/g41s-k/romstage.c | 3 |
2 files changed, 0 insertions, 6 deletions
diff --git a/src/mainboard/foxconn/d41s/romstage.c b/src/mainboard/foxconn/d41s/romstage.c index 194bd7373e..cde813c159 100644 --- a/src/mainboard/foxconn/d41s/romstage.c +++ b/src/mainboard/foxconn/d41s/romstage.c @@ -84,9 +84,6 @@ void mainboard_romstage_entry(unsigned long bist) int s3resume = 0; int boot_path; - timestamp_init(get_initial_timestamp()); - timestamp_add_now(TS_START_ROMSTAGE); - if (bist == 0) enable_lapic(); diff --git a/src/mainboard/foxconn/g41s-k/romstage.c b/src/mainboard/foxconn/g41s-k/romstage.c index a695c53505..3ebcce3322 100644 --- a/src/mainboard/foxconn/g41s-k/romstage.c +++ b/src/mainboard/foxconn/g41s-k/romstage.c @@ -87,9 +87,6 @@ void mainboard_romstage_entry(unsigned long bist) u8 boot_path = 0; u8 s3_resume; - timestamp_init(get_initial_timestamp()); - timestamp_add_now(TS_START_ROMSTAGE); - /* Set up southbridge and Super I/O GPIOs. */ ich7_enable_lpc(); mb_lpc_setup(); |