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diff --git a/src/mainboard/foxconn/g41s-k/devicetree.cb b/src/mainboard/foxconn/g41s-k/devicetree.cb
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+++ b/src/mainboard/foxconn/g41s-k/devicetree.cb
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+##
+## This file is part of the coreboot project.
+##
+## Copyright (C) 2015 Damien Zammit <damien@zamaudio.com>
+## Copyright (C) 2017 Arthur Heymans <arthur@aheymans.xyz>
+## Copyright (C) 2017 Samuel Holland <samuel@sholland.org>
+##
+## This program is free software; you can redistribute it and/or modify
+## it under the terms of the GNU General Public License as published by
+## the Free Software Foundation; either version 2 of the License, or
+## (at your option) any later version.
+##
+## This program is distributed in the hope that it will be useful,
+## but WITHOUT ANY WARRANTY; without even the implied warranty of
+## MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+## GNU General Public License for more details.
+##
+
+chip northbridge/intel/x4x # Northbridge
+ device cpu_cluster 0 on # APIC cluster
+ chip cpu/intel/socket_LGA775
+ device lapic 0 on end
+ end
+ chip cpu/intel/model_1067x # CPU
+ device lapic 0xACAC off end
+ end
+ end
+ device domain 0 on # PCI domain
+ subsystemid 0x105b 0x0dda inherit
+ device pci 0.0 on # Host Bridge
+ subsystemid 0x105b 0x0dda
+ end
+ device pci 1.0 on end # PEG
+ device pci 2.0 on # Integrated graphics controller
+ subsystemid 0x105b 0x0dda
+ end
+ device pci 2.1 off end # Integrated graphics controller 2
+ device pci 3.0 off end # ME
+ device pci 3.1 off end # ME
+ chip southbridge/intel/i82801gx # Southbridge
+ register "pirqa_routing" = "0x0a"
+ register "pirqb_routing" = "0x0b"
+ register "pirqc_routing" = "0x0a"
+ register "pirqd_routing" = "0x05"
+ register "pirqe_routing" = "0x0a"
+ register "pirqf_routing" = "0x0b"
+ register "pirqg_routing" = "0x0a"
+ register "pirqh_routing" = "0x03"
+
+ register "gpe0_en" = "0x00000441"
+ register "alt_gp_smi_en" = "0x0000"
+
+ register "ide_enable_primary" = "0x0"
+ register "ide_enable_secondary" = "0x0"
+ register "sata_ahci" = "0x0" # AHCI does not work
+ register "sata_ports_implemented" = "0x3"
+
+ device pci 1b.0 on # Audio
+ subsystemid 0x105b 0x0dda
+ end
+ device pci 1c.0 on end # PCIe 1
+ device pci 1c.1 on # PCIe 2 (NIC)
+ device pci 00.0 on # PCI 10ec:8168
+ subsystemid 0x105b 0x0dda
+ end
+ end
+ device pci 1c.2 off end # PCIe 3
+ device pci 1c.3 off end # PCIe 4
+ device pci 1d.0 on # USB
+ subsystemid 0x105b 0x0dda
+ end
+ device pci 1d.1 on # USB
+ subsystemid 0x105b 0x0dda
+ end
+ device pci 1d.2 on # USB
+ subsystemid 0x105b 0x0dda
+ end
+ device pci 1d.3 on # USB
+ subsystemid 0x105b 0x0dda
+ end
+ device pci 1d.7 on # USB
+ subsystemid 0x105b 0x0dda
+ end
+ device pci 1e.0 on end # PCI bridge
+ device pci 1f.0 on # ISA bridge
+ subsystemid 0x105b 0x0dda
+ chip superio/ite/it8720f # Super I/O
+ register "TMPIN1" = "THERMAL_DIODE"
+ register "TMPIN2" = "THERMAL_RESISTOR"
+ register "TMPIN3" = "THERMAL_MODE_DISABLED"
+
+ register "ec.vin_mask" = "VIN_ALL"
+
+ register "FAN1.mode" = "FAN_SMART_AUTOMATIC" # System fan
+ register "FAN1.smart.tmpin" = "1"
+ register "FAN1.smart.tmp_off" = "25"
+ register "FAN1.smart.tmp_start" = "30"
+ register "FAN1.smart.tmp_full" = "65"
+ register "FAN1.smart.tmp_delta" = "3"
+ register "FAN1.smart.smoothing" = "1"
+ register "FAN1.smart.pwm_start" = "20"
+ register "FAN1.smart.slope" = "10"
+ register "FAN2.mode" = "FAN_SMART_AUTOMATIC" # CPU fan
+ register "FAN2.smart.tmpin" = "1"
+ register "FAN2.smart.tmp_off" = "25"
+ register "FAN2.smart.tmp_start" = "30"
+ register "FAN2.smart.tmp_full" = "65"
+ register "FAN2.smart.tmp_delta" = "3"
+ register "FAN2.smart.smoothing" = "1"
+ register "FAN2.smart.pwm_start" = "20"
+ register "FAN2.smart.slope" = "10"
+ register "FAN3.mode" = "FAN_MODE_OFF" # Not connected
+
+ device pnp 2e.0 off end # Floppy
+ device pnp 2e.1 on # COM1
+ io 0x60 = 0x3f8
+ irq 0x70 = 0x04
+ irq 0xf0 = 0x00
+ irq 0xf1 = 0x50
+ end
+ device pnp 2e.2 on # COM2 (IR)
+ io 0x60 = 0x2f8
+ irq 0x70 = 0x03
+ irq 0xf0 = 0x10 # IrDA SIR mode
+ irq 0xf1 = 0x50
+ end
+ device pnp 2e.3 off end # Parallel port
+ device pnp 2e.4 on # Environment controller
+ io 0x60 = 0xa10
+ io 0x62 = 0xa00
+ irq 0x70 = 0x00
+ irq 0xf0 = 0x80
+ irq 0xf1 = 0x00
+ irq 0xf2 = 0x0a
+ irq 0xf3 = 0x00
+ irq 0xf4 = 0x80
+ irq 0xf5 = 0x00
+ irq 0xf6 = 0x00
+ end
+ device pnp 2e.5 on # Keyboard
+ io 0x60 = 0x060
+ io 0x62 = 0x064
+ irq 0x70 = 0x01
+ irq 0xf0 = 0x00
+ end
+ device pnp 2e.6 on # Mouse
+ irq 0x70 = 0x0c
+ irq 0xf0 = 0x00
+ end
+ device pnp 2e.7 on # GPIO
+ io 0x60 = 0x000
+ io 0x62 = 0xa20
+ io 0x64 = 0xa30
+ irq 0xf0 = 0x00
+ irq 0xf1 = 0x00
+ irq 0xf2 = 0x00
+ irq 0xf3 = 0x00
+ irq 0xf4 = 0x00
+ irq 0xf5 = 0x00
+ irq 0xf6 = 0x22
+ irq 0xf7 = 0x00
+ irq 0xf8 = 0x00
+ irq 0xf9 = 0x00
+ irq 0xfa = 0x00
+ irq 0xfb = 0x00
+ irq 0xfd = 0x00
+ irq 0xfe = 0x00
+ end
+ device pnp 2e.a on # CIR
+ io 0x60 = 0x3e0
+ irq 0x70 = 0x0a
+ irq 0xf0 = 0x00
+ end
+ end
+ end
+ device pci 1f.1 off end # PATA/IDE
+ device pci 1f.2 on # SATA
+ subsystemid 0x105b 0x0dda
+ end
+ device pci 1f.3 on # SMbus
+ subsystemid 0x105b 0x0dda
+ end
+ device pci 1f.4 off end
+ device pci 1f.5 off end
+ device pci 1f.6 off end
+ end
+ end
+end