diff options
Diffstat (limited to 'src/mainboard/foxconn/d41s/acpi')
| -rw-r--r-- | src/mainboard/foxconn/d41s/acpi/ec.asl | 1 | ||||
| -rw-r--r-- | src/mainboard/foxconn/d41s/acpi/ich7_pci_irqs.asl | 36 | ||||
| -rw-r--r-- | src/mainboard/foxconn/d41s/acpi/platform.asl | 28 | ||||
| -rw-r--r-- | src/mainboard/foxconn/d41s/acpi/superio.asl | 31 |
4 files changed, 96 insertions, 0 deletions
diff --git a/src/mainboard/foxconn/d41s/acpi/ec.asl b/src/mainboard/foxconn/d41s/acpi/ec.asl new file mode 100644 index 0000000000..31eb392c8a --- /dev/null +++ b/src/mainboard/foxconn/d41s/acpi/ec.asl @@ -0,0 +1 @@ +/* Dummy file - No license required. */ diff --git a/src/mainboard/foxconn/d41s/acpi/ich7_pci_irqs.asl b/src/mainboard/foxconn/d41s/acpi/ich7_pci_irqs.asl new file mode 100644 index 0000000000..23c39ef5f2 --- /dev/null +++ b/src/mainboard/foxconn/d41s/acpi/ich7_pci_irqs.asl @@ -0,0 +1,36 @@ +/* + * This file is part of the coreboot project. + * + * Copyright (C) 2017 Arthur Heymans <arthur@aheymans.xyz> + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License as + * published by the Free Software Foundation; version 2 of the License. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + */ + +/* This is board specific information: + * IRQ routing for the 0:1e.0 PCI bridge of the ICH7 + */ + +If (PICM) { + Return (Package() { + Package() { 0x0000ffff, 0, 0, 0x15}, + Package() { 0x0000ffff, 1, 0, 0x16}, + Package() { 0x0000ffff, 2, 0, 0x17}, + Package() { 0x0000ffff, 3, 0, 0x14}, + Package() { 0x0001ffff, 0, 0, 0x13}, + }) +} Else { + Return (Package() { + Package() { 0x0000ffff, 0, \_SB.PCI0.LPCB.LNKF, 0}, + Package() { 0x0000ffff, 1, \_SB.PCI0.LPCB.LNKG, 0}, + Package() { 0x0000ffff, 2, \_SB.PCI0.LPCB.LNKH, 0}, + Package() { 0x0000ffff, 3, \_SB.PCI0.LPCB.LNKE, 0}, + Package() { 0x0001ffff, 0, \_SB.PCI0.LPCB.LNKD, 0}, + }) +} diff --git a/src/mainboard/foxconn/d41s/acpi/platform.asl b/src/mainboard/foxconn/d41s/acpi/platform.asl new file mode 100644 index 0000000000..6c92a4ed47 --- /dev/null +++ b/src/mainboard/foxconn/d41s/acpi/platform.asl @@ -0,0 +1,28 @@ +/* + * This file is part of the coreboot project. + * + * Copyright (C) 2015 Damien Zammit <damien@zamaudio.com> + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License as + * published by the Free Software Foundation; version 2 of the License. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + */ + +Method(_PIC, 1) +{ + /* Remember the OS' IRQ routing choice. */ + Store(Arg0, PICM) +} + +/* SMI I/O Trap */ +Method(TRAP, 1, Serialized) +{ + Store (Arg0, SMIF) /* SMI Function */ + Store (0, TRP0) /* Generate trap */ + Return (SMIF) /* Return value of SMI handler */ +} diff --git a/src/mainboard/foxconn/d41s/acpi/superio.asl b/src/mainboard/foxconn/d41s/acpi/superio.asl new file mode 100644 index 0000000000..07742e88a2 --- /dev/null +++ b/src/mainboard/foxconn/d41s/acpi/superio.asl @@ -0,0 +1,31 @@ +/* + * This file is part of the coreboot project. + * + * Copyright (C) 2016 secunet Security Networks AG + * Copyright (C) 2017 Samuel Holland <samuel@sholland.org> + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; version 2 of the License. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + */ + +#undef SUPERIO_DEV +#undef SUPERIO_PNP_BASE +#undef IT8721F_SHOW_SP1 +#undef IT8721F_SHOW_SP2 +#undef IT8721F_SHOW_EC +#undef IT8721F_SHOW_KBCK +#undef IT8721F_SHOW_KBCM +#define SUPERIO_DEV SIO0 +#define SUPERIO_PNP_BASE 0x2e +#define IT8721F_SHOW_SP1 +#define IT8721F_SHOW_SP2 +#define IT8721F_SHOW_EC +#define IT8721F_SHOW_KBCK +#define IT8721F_SHOW_KBCM +#include <superio/ite/it8721f/acpi/superio.asl> |