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-rw-r--r--src/mainboard/emulation/qemu-aarch64/memlayout.ld3
-rw-r--r--src/mainboard/emulation/qemu-armv7/memlayout.ld1
-rw-r--r--src/mainboard/emulation/qemu-power8/memlayout.ld1
-rw-r--r--src/mainboard/emulation/qemu-riscv/memlayout.ld1
-rw-r--r--src/mainboard/emulation/spike-riscv/memlayout.ld3
5 files changed, 7 insertions, 2 deletions
diff --git a/src/mainboard/emulation/qemu-aarch64/memlayout.ld b/src/mainboard/emulation/qemu-aarch64/memlayout.ld
index cee77cd45f..ae00e96665 100644
--- a/src/mainboard/emulation/qemu-aarch64/memlayout.ld
+++ b/src/mainboard/emulation/qemu-aarch64/memlayout.ld
@@ -19,7 +19,8 @@ SECTIONS
REGION(secram, 0xe000000, 0x1000000, 4096)
DRAM_START(0x40000000)
BOOTBLOCK(0x60010000, 64K)
- STACK(0x60020000, 62K)
+ STACK(0x60020000, 54K)
+ CBFS_MCACHE(0x6002D800, 8K)
FMAP_CACHE(0x6002F800, 2K)
TIMESTAMP(0x60030000, 1K)
ROMSTAGE(0x60031000, 128K)
diff --git a/src/mainboard/emulation/qemu-armv7/memlayout.ld b/src/mainboard/emulation/qemu-armv7/memlayout.ld
index 4ddc6d2adc..5f32d8b7cc 100644
--- a/src/mainboard/emulation/qemu-armv7/memlayout.ld
+++ b/src/mainboard/emulation/qemu-armv7/memlayout.ld
@@ -35,6 +35,7 @@ SECTIONS
BOOTBLOCK(0x60010000, 128K)
FMAP_CACHE(0x60030000, 4K)
TIMESTAMP(0x60031000, 1K)
+ CBFS_MCACHE(0x60031400, 7K)
/* TODO: Implement MMU support and move TTB to a better location. */
TTB(0x60034000, 16K)
ROMSTAGE(0x60038000, 128K)
diff --git a/src/mainboard/emulation/qemu-power8/memlayout.ld b/src/mainboard/emulation/qemu-power8/memlayout.ld
index 90aaec631d..66f2c7577b 100644
--- a/src/mainboard/emulation/qemu-power8/memlayout.ld
+++ b/src/mainboard/emulation/qemu-power8/memlayout.ld
@@ -13,5 +13,6 @@ SECTIONS
STACK(0x40000, 0x3ff00)
PRERAM_CBMEM_CONSOLE(0x80000, 8K)
FMAP_CACHE(0x82000, 2K)
+ CBFS_MCACHE(0x82800, 8K)
RAMSTAGE(0x100000, 16M)
}
diff --git a/src/mainboard/emulation/qemu-riscv/memlayout.ld b/src/mainboard/emulation/qemu-riscv/memlayout.ld
index cfa0513520..96ab74c516 100644
--- a/src/mainboard/emulation/qemu-riscv/memlayout.ld
+++ b/src/mainboard/emulation/qemu-riscv/memlayout.ld
@@ -25,6 +25,7 @@ SECTIONS
#endif
PRERAM_CBMEM_CONSOLE(STAGES_START + 128K, 8K)
FMAP_CACHE(STAGES_START + 136K, 2K)
+ CBFS_MCACHE(STAGES_START + 138K, 8K)
RAMSTAGE(STAGES_START + 200K, 16M)
STACK(STAGES_START + 200K + 16M, 4K)
}
diff --git a/src/mainboard/emulation/spike-riscv/memlayout.ld b/src/mainboard/emulation/spike-riscv/memlayout.ld
index e08fd72b24..7ec489292c 100644
--- a/src/mainboard/emulation/spike-riscv/memlayout.ld
+++ b/src/mainboard/emulation/spike-riscv/memlayout.ld
@@ -12,7 +12,8 @@ SECTIONS
BOOTBLOCK(START, 64K)
STACK(START + 8M, 4K)
FMAP_CACHE(START + 8M + 4K, 2K)
- /* hole at (START + 8M + 6K, 58K) */
+ CBFS_MCACHE(START + 8M + 6K, 8K)
+ /* hole at (START + 8M + 14K, 50K) */
ROMSTAGE(START + 8M + 64K, 128K)
PRERAM_CBMEM_CONSOLE(START + 8M + 192k, 8K)
RAMSTAGE(START + 8M + 200K, 256K)