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-rw-r--r--src/mainboard/broadcom/blast/get_bus_conf.c4
-rw-r--r--src/mainboard/broadcom/blast/mptable.c2
-rw-r--r--src/mainboard/broadcom/blast/romstage.c2
3 files changed, 4 insertions, 4 deletions
diff --git a/src/mainboard/broadcom/blast/get_bus_conf.c b/src/mainboard/broadcom/blast/get_bus_conf.c
index 869f04967b..36959a4a7b 100644
--- a/src/mainboard/broadcom/blast/get_bus_conf.c
+++ b/src/mainboard/broadcom/blast/get_bus_conf.c
@@ -3,7 +3,7 @@
#include <device/pci_ids.h>
#include <string.h>
#include <stdint.h>
-#if CONFIG_LOGICAL_CPUS==1
+#if CONFIG_LOGICAL_CPUS
#include <cpu/amd/multicore.h>
#endif
@@ -101,7 +101,7 @@ void get_bus_conf(void)
/*I/O APICs: APIC ID Version State Address*/
-#if CONFIG_LOGICAL_CPUS==1
+#if CONFIG_LOGICAL_CPUS
apicid_base = get_apicid_base(3);
#else
apicid_base = CONFIG_MAX_PHYSICAL_CPUS;
diff --git a/src/mainboard/broadcom/blast/mptable.c b/src/mainboard/broadcom/blast/mptable.c
index 5a1bf28bf3..d7ae6b787c 100644
--- a/src/mainboard/broadcom/blast/mptable.c
+++ b/src/mainboard/broadcom/blast/mptable.c
@@ -4,7 +4,7 @@
#include <device/pci.h>
#include <string.h>
#include <stdint.h>
-#if CONFIG_LOGICAL_CPUS==1
+#if CONFIG_LOGICAL_CPUS
#include <cpu/amd/multicore.h>
#endif
#include <cpu/amd/amdk8_sysconf.h>
diff --git a/src/mainboard/broadcom/blast/romstage.c b/src/mainboard/broadcom/blast/romstage.c
index 4dee7637c9..df7b615c15 100644
--- a/src/mainboard/broadcom/blast/romstage.c
+++ b/src/mainboard/broadcom/blast/romstage.c
@@ -105,7 +105,7 @@ void cache_as_ram_main(unsigned long bist, unsigned long cpu_init_detectedx)
needs_reset = setup_coherent_ht_domain();
-#if CONFIG_LOGICAL_CPUS==1
+#if CONFIG_LOGICAL_CPUS
// It is said that we should start core1 after all core0 launched
wait_all_core0_started();
start_other_cores();