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-rw-r--r--src/mainboard/biostar/a68n_5200/BiosCallOuts.c170
-rw-r--r--src/mainboard/biostar/a68n_5200/Kconfig43
-rw-r--r--src/mainboard/biostar/a68n_5200/Kconfig.name2
-rw-r--r--src/mainboard/biostar/a68n_5200/Makefile.inc11
-rw-r--r--src/mainboard/biostar/a68n_5200/OemCustomize.c139
-rw-r--r--src/mainboard/biostar/a68n_5200/OptionsIds.h38
-rw-r--r--src/mainboard/biostar/a68n_5200/acpi/AmdImc.asl97
-rw-r--r--src/mainboard/biostar/a68n_5200/acpi/gpe.asl61
-rw-r--r--src/mainboard/biostar/a68n_5200/acpi/mainboard.asl9
-rw-r--r--src/mainboard/biostar/a68n_5200/acpi/routing.asl169
-rw-r--r--src/mainboard/biostar/a68n_5200/acpi/sata.asl3
-rw-r--r--src/mainboard/biostar/a68n_5200/acpi/sleep.asl64
-rw-r--r--src/mainboard/biostar/a68n_5200/acpi/superio.asl3
-rw-r--r--src/mainboard/biostar/a68n_5200/acpi/thermal.asl3
-rw-r--r--src/mainboard/biostar/a68n_5200/acpi/usb_oc.asl13
-rw-r--r--src/mainboard/biostar/a68n_5200/board_info.txt1
-rw-r--r--src/mainboard/biostar/a68n_5200/bootblock.c51
-rw-r--r--src/mainboard/biostar/a68n_5200/buildOpts.c45
-rw-r--r--src/mainboard/biostar/a68n_5200/cmos.layout35
-rw-r--r--src/mainboard/biostar/a68n_5200/devicetree.cb86
-rw-r--r--src/mainboard/biostar/a68n_5200/dsdt.asl71
-rw-r--r--src/mainboard/biostar/a68n_5200/irq_tables.c88
-rw-r--r--src/mainboard/biostar/a68n_5200/mainboard.c40
-rw-r--r--src/mainboard/biostar/am1ml/BiosCallOuts.c113
-rw-r--r--src/mainboard/biostar/am1ml/Kconfig49
-rw-r--r--src/mainboard/biostar/am1ml/Kconfig.name2
-rw-r--r--src/mainboard/biostar/am1ml/Makefile.inc11
-rw-r--r--src/mainboard/biostar/am1ml/OemCustomize.c143
-rw-r--r--src/mainboard/biostar/am1ml/OptionsIds.h38
-rw-r--r--src/mainboard/biostar/am1ml/acpi/flag0.asl9
-rw-r--r--src/mainboard/biostar/am1ml/acpi/gpe.asl61
-rw-r--r--src/mainboard/biostar/am1ml/acpi/ide.asl227
-rw-r--r--src/mainboard/biostar/am1ml/acpi/mainboard.asl9
-rw-r--r--src/mainboard/biostar/am1ml/acpi/routing.asl169
-rw-r--r--src/mainboard/biostar/am1ml/acpi/sata.asl129
-rw-r--r--src/mainboard/biostar/am1ml/acpi/sio.asl65
-rw-r--r--src/mainboard/biostar/am1ml/acpi/sleep.asl64
-rw-r--r--src/mainboard/biostar/am1ml/acpi/superio.asl85
-rw-r--r--src/mainboard/biostar/am1ml/acpi/thermal.asl3
-rw-r--r--src/mainboard/biostar/am1ml/acpi/usb_oc.asl13
-rw-r--r--src/mainboard/biostar/am1ml/board_info.txt5
-rw-r--r--src/mainboard/biostar/am1ml/bootblock.c70
-rw-r--r--src/mainboard/biostar/am1ml/buildOpts.c49
-rw-r--r--src/mainboard/biostar/am1ml/cmos.layout70
-rw-r--r--src/mainboard/biostar/am1ml/devicetree.cb94
-rw-r--r--src/mainboard/biostar/am1ml/dsdt.asl78
-rw-r--r--src/mainboard/biostar/am1ml/irq_tables.c40
-rw-r--r--src/mainboard/biostar/am1ml/mainboard.c90
48 files changed, 0 insertions, 2928 deletions
diff --git a/src/mainboard/biostar/a68n_5200/BiosCallOuts.c b/src/mainboard/biostar/a68n_5200/BiosCallOuts.c
deleted file mode 100644
index f1560c47e4..0000000000
--- a/src/mainboard/biostar/a68n_5200/BiosCallOuts.c
+++ /dev/null
@@ -1,170 +0,0 @@
-/* SPDX-License-Identifier: GPL-2.0-only */
-
-#include <AGESA.h>
-#include <northbridge/amd/agesa/BiosCallOuts.h>
-#include <northbridge/amd/agesa/state_machine.h>
-#include <FchPlatform.h>
-
-#include "imc.h"
-
-const BIOS_CALLOUT_STRUCT BiosCallouts[] =
-{
- {AGESA_DO_RESET, agesa_Reset },
- {AGESA_READ_SPD, agesa_ReadSpd },
- {AGESA_READ_SPD_RECOVERY, agesa_NoopUnsupported },
- {AGESA_RUNFUNC_ONAP, agesa_RunFuncOnAp },
- {AGESA_GET_IDS_INIT_DATA, agesa_EmptyIdsInitData },
- {AGESA_HOOKBEFORE_DQS_TRAINING, agesa_NoopSuccess },
- {AGESA_HOOKBEFORE_EXIT_SELF_REF, agesa_NoopSuccess },
- {AGESA_GNB_GFX_GET_VBIOS_IMAGE, agesa_GfxGetVbiosImage }
-};
-const int BiosCalloutsLen = ARRAY_SIZE(BiosCallouts);
-
-/**
- * AMD Olivehill Platform ALC272 Verb Table
- */
-static const CODEC_ENTRY Olivehill_Alc272_VerbTbl[] = {
- {0x11, 0x411111F0}, // - SPDIF_OUT2
- {0x12, 0x411111F0}, // - DMIC_1/2
- {0x13, 0x411111F0}, // - DMIC_3/4
- {0x14, 0x411111F0}, // Port D - LOUT1
- {0x15, 0x411111F0}, // Port A - LOUT2
- {0x16, 0x411111F0}, //
- {0x17, 0x411111F0}, // Port H - MONO
- {0x18, 0x01a19840}, // Port B - MIC1
- {0x19, 0x411111F0}, // Port F - MIC2
- {0x1a, 0x01813030}, // Port C - LINE1
- {0x1b, 0x411111F0}, // Port E - LINE2
- {0x1d, 0x40130605}, // - PCBEEP
- {0x1e, 0x01441120}, // - SPDIF_OUT1
- {0x21, 0x01214010}, // Port I - HPOUT
- {0xff, 0xffffffff}
-};
-
-static const CODEC_TBL_LIST OlivehillCodecTableList[] =
-{
- {0x10ec0272, (CODEC_ENTRY*)&Olivehill_Alc272_VerbTbl[0]},
- {(UINT32)0x0FFFFFFFF, (CODEC_ENTRY*)0x0FFFFFFFFUL}
-};
-
-#define FAN_INPUT_INTERNAL_DIODE 0
-#define FAN_INPUT_TEMP0 1
-#define FAN_INPUT_TEMP1 2
-#define FAN_INPUT_TEMP2 3
-#define FAN_INPUT_TEMP3 4
-#define FAN_INPUT_TEMP0_FILTER 5
-#define FAN_INPUT_ZERO 6
-#define FAN_INPUT_DISABLED 7
-
-#define FAN_AUTOMODE (1 << 0)
-#define FAN_LINEARMODE (1 << 1)
-#define FAN_STEPMODE ~(1 << 1)
-#define FAN_POLARITY_HIGH (1 << 2)
-#define FAN_POLARITY_LOW ~(1 << 2)
-
-/* Normally, 4-wire fan runs at 25KHz and 3-wire fan runs at 100Hz */
-#define FREQ_28KHZ 0x0
-#define FREQ_25KHZ 0x1
-#define FREQ_23KHZ 0x2
-#define FREQ_21KHZ 0x3
-#define FREQ_29KHZ 0x4
-#define FREQ_18KHZ 0x5
-#define FREQ_100HZ 0xF7
-#define FREQ_87HZ 0xF8
-#define FREQ_58HZ 0xF9
-#define FREQ_44HZ 0xFA
-#define FREQ_35HZ 0xFB
-#define FREQ_29HZ 0xFC
-#define FREQ_22HZ 0xFD
-#define FREQ_14HZ 0xFE
-#define FREQ_11HZ 0xFF
-
-/* Hardware Monitor Fan Control
- * Hardware limitation:
- * HWM failed to read the input temperature via I2C,
- * if other software switches the I2C switch by mistake or intention.
- * We recommend using IMC to control Fans, instead of HWM.
- */
-static void oem_fan_control(FCH_DATA_BLOCK *FchParams)
-{
- /* Enable IMC fan control, the recommended way */
- if (CONFIG(HUDSON_IMC_FWM)) {
- imc_reg_init();
-
- /* HwMonitorEnable = TRUE && HwmFchtsiAutoOpll ==FALSE to call FchECfancontrolservice */
- FchParams->Hwm.HwMonitorEnable = TRUE;
- FchParams->Hwm.HwmFchtsiAutoPoll = FALSE;/* 0 disable, 1 enable TSI Auto Polling */
-
- FchParams->Imc.ImcEnable = TRUE;
- FchParams->Hwm.HwmControl = 1; /* 1 IMC, 0 HWM */
- FchParams->Imc.ImcEnableOverWrite = 1; /* 2 disable IMC, 1 enable IMC, 0 following hw strap setting */
-
- LibAmdMemFill(&(FchParams->Imc.EcStruct), 0, sizeof(FCH_EC), FchParams->StdHeader);
-
- /* Thermal Zone Parameter */
- FchParams->Imc.EcStruct.MsgFun81Zone0MsgReg0 = 0x00;
- FchParams->Imc.EcStruct.MsgFun81Zone0MsgReg1 = 0x00; /* Zone */
- FchParams->Imc.EcStruct.MsgFun81Zone0MsgReg2 = 0x3d; //BIT0 | BIT2 | BIT5;
- FchParams->Imc.EcStruct.MsgFun81Zone0MsgReg3 = 0x4e;//6 | BIT3;
- FchParams->Imc.EcStruct.MsgFun81Zone0MsgReg4 = 0x00;
- FchParams->Imc.EcStruct.MsgFun81Zone0MsgReg5 = 0x04;
- FchParams->Imc.EcStruct.MsgFun81Zone0MsgReg6 = 0x9a; /* SMBUS Address for SMBUS based temperature sensor such as SB-TSI and ADM1032 */
- FchParams->Imc.EcStruct.MsgFun81Zone0MsgReg7 = 0x01;
- FchParams->Imc.EcStruct.MsgFun81Zone0MsgReg8 = 0x01; /* PWM stepping rate in unit of PWM level percentage */
- FchParams->Imc.EcStruct.MsgFun81Zone0MsgReg9 = 0x00;
-
- /* IMC Fan Policy temperature thresholds */
- FchParams->Imc.EcStruct.MsgFun83Zone0MsgReg0 = 0x00;
- FchParams->Imc.EcStruct.MsgFun83Zone0MsgReg1 = 0x00; /* Zone */
- FchParams->Imc.EcStruct.MsgFun83Zone0MsgReg2 = 0x46;///80; /*AC0 threshold in Celsius */
- FchParams->Imc.EcStruct.MsgFun83Zone0MsgReg3 = 0x3c; /*AC1 threshold in Celsius */
- FchParams->Imc.EcStruct.MsgFun83Zone0MsgReg4 = 0x32; /*AC2 threshold in Celsius */
- FchParams->Imc.EcStruct.MsgFun83Zone0MsgReg5 = 0xff; /*AC3 threshold in Celsius, 0xFF is not define */
- FchParams->Imc.EcStruct.MsgFun83Zone0MsgReg6 = 0xff; /*AC4 threshold in Celsius, 0xFF is not define */
- FchParams->Imc.EcStruct.MsgFun83Zone0MsgReg7 = 0xff; /*AC5 threshold in Celsius, 0xFF is not define */
- FchParams->Imc.EcStruct.MsgFun83Zone0MsgReg8 = 0xff; /*AC6 threshold in Celsius, 0xFF is not define */
- FchParams->Imc.EcStruct.MsgFun83Zone0MsgReg9 = 0xff; /*AC7 lowest threshold in Celsius, 0xFF is not define */
- FchParams->Imc.EcStruct.MsgFun83Zone0MsgRegA = 0x4b; /*critical threshold* in Celsius, 0xFF is not define */
- FchParams->Imc.EcStruct.MsgFun83Zone0MsgRegB = 0x00;
-
- /* IMC Fan Policy PWM Settings */
- FchParams->Imc.EcStruct.MsgFun85Zone0MsgReg0 = 0x00;
- FchParams->Imc.EcStruct.MsgFun85Zone0MsgReg1 = 0x00; /* Zone */
- FchParams->Imc.EcStruct.MsgFun85Zone0MsgReg2 = 0x5a; /* AL0 percentage */
- FchParams->Imc.EcStruct.MsgFun85Zone0MsgReg3 = 0x46; /* AL1 percentage */
- FchParams->Imc.EcStruct.MsgFun85Zone0MsgReg4 = 0x28; /* AL2 percentage */
- FchParams->Imc.EcStruct.MsgFun85Zone0MsgReg5 = 0xff; /* AL3 percentage */
- FchParams->Imc.EcStruct.MsgFun85Zone0MsgReg6 = 0xff; /* AL4 percentage */
- FchParams->Imc.EcStruct.MsgFun85Zone0MsgReg7 = 0xff; /* AL5 percentage */
- FchParams->Imc.EcStruct.MsgFun85Zone0MsgReg8 = 0xff; /* AL6 percentage */
- FchParams->Imc.EcStruct.MsgFun85Zone0MsgReg9 = 0xff; /* AL7 percentage */
-
- FchParams->Imc.EcStruct.IMCFUNSupportBitMap = 0x111;//BIT0 | BIT4 |BIT8;
-
- /* NOTE:
- * FchInitLateHwm will overwrite the EcStruct with EcDefaultMessage,
- * AGESA puts EcDefaultMessage as global data in ROM, so we can't overwrite it.
- * So we remove it from AGESA code. Please See FchInitLateHwm.
- */
- } else {
- /* HWM fan control, the way not recommended */
- FchParams->Imc.ImcEnable = FALSE;
- FchParams->Hwm.HwMonitorEnable = TRUE;
- FchParams->Hwm.HwmFchtsiAutoPoll = TRUE;/* 1 enable, 0 disable TSI Auto Polling */
- }
-}
-
-void board_FCH_InitReset(struct sysinfo *cb_NA, FCH_RESET_DATA_BLOCK *FchParams_reset)
-{
- FchParams_reset->Mode = FCH_SPI_MODE_NORMAL;
- FchParams_reset->QeEnabled = FALSE;
-}
-
-void board_FCH_InitEnv(struct sysinfo *cb_NA, FCH_DATA_BLOCK *FchParams_env)
-{
- /* Azalia Controller OEM Codec Table Pointer */
- FchParams_env->Azalia.AzaliaOemCodecTablePtr = (CODEC_TBL_LIST *)(&OlivehillCodecTableList[0]);
-
- /* Fan Control */
- oem_fan_control(FchParams_env);
-}
diff --git a/src/mainboard/biostar/a68n_5200/Kconfig b/src/mainboard/biostar/a68n_5200/Kconfig
deleted file mode 100644
index f5a5491cdf..0000000000
--- a/src/mainboard/biostar/a68n_5200/Kconfig
+++ /dev/null
@@ -1,43 +0,0 @@
-# SPDX-License-Identifier: GPL-2.0-only
-
-if BOARD_BIOSTAR_A68N5200
-
-config BOARD_SPECIFIC_OPTIONS
- def_bool y
- select CPU_AMD_AGESA_FAMILY16_KB
- select NORTHBRIDGE_AMD_AGESA_FAMILY16_KB
- select SOUTHBRIDGE_AMD_AGESA_YANGTZE
- select SUPERIO_ITE_IT8728F
- select HAVE_OPTION_TABLE
- select HAVE_PIRQ_TABLE
- select HAVE_ACPI_TABLES
- select BOARD_ROMSIZE_KB_4096
- select GFXUMA
-
-config MAINBOARD_DIR
- default "biostar/a68n_5200"
-
-config MAINBOARD_PART_NUMBER
- default "A68N5200"
-
-config HW_MEM_HOLE_SIZEK
- hex
- default 0x200000
-
-config MAX_CPUS
- int
- default 4
-
-config IRQ_SLOT_COUNT
- int
- default 11
-
-config ONBOARD_VGA_IS_PRIMARY
- bool
- default y
-
-config HUDSON_LEGACY_FREE
- bool
- default n
-
-endif # BOARD_BIOSTAR_A68N5200
diff --git a/src/mainboard/biostar/a68n_5200/Kconfig.name b/src/mainboard/biostar/a68n_5200/Kconfig.name
deleted file mode 100644
index 52a7f1511a..0000000000
--- a/src/mainboard/biostar/a68n_5200/Kconfig.name
+++ /dev/null
@@ -1,2 +0,0 @@
-config BOARD_BIOSTAR_A68N5200
- bool "A68N-5200"
diff --git a/src/mainboard/biostar/a68n_5200/Makefile.inc b/src/mainboard/biostar/a68n_5200/Makefile.inc
deleted file mode 100644
index 549801d78f..0000000000
--- a/src/mainboard/biostar/a68n_5200/Makefile.inc
+++ /dev/null
@@ -1,11 +0,0 @@
-# SPDX-License-Identifier: GPL-2.0-only
-
-bootblock-y += bootblock.c
-
-romstage-y += buildOpts.c
-romstage-y += BiosCallOuts.c
-romstage-y += OemCustomize.c
-
-ramstage-y += buildOpts.c
-ramstage-y += BiosCallOuts.c
-ramstage-y += OemCustomize.c
diff --git a/src/mainboard/biostar/a68n_5200/OemCustomize.c b/src/mainboard/biostar/a68n_5200/OemCustomize.c
deleted file mode 100644
index 18db54049e..0000000000
--- a/src/mainboard/biostar/a68n_5200/OemCustomize.c
+++ /dev/null
@@ -1,139 +0,0 @@
-/* SPDX-License-Identifier: GPL-2.0-only */
-
-#include <AGESA.h>
-#include <PlatformMemoryConfiguration.h>
-
-#include <northbridge/amd/agesa/state_machine.h>
-
-static const PCIe_PORT_DESCRIPTOR PortList[] = {
- {
- 0,
- PCIE_ENGINE_DATA_INITIALIZER(PciePortEngine, 3, 3),
- PCIE_PORT_DATA_INITIALIZER_V2(PortEnabled, ChannelTypeExt6db, 2, 5,
- HotplugDisabled,
- PcieGenMaxSupported,
- PcieGenMaxSupported,
- AspmDisabled, 0x01, 0)
- },
- /* Initialize Port descriptor (PCIe port, Lanes 1, PCI Device Number 2, ...) */
- {
- 0,
- PCIE_ENGINE_DATA_INITIALIZER(PciePortEngine, 2, 2),
- PCIE_PORT_DATA_INITIALIZER_V2(PortEnabled, ChannelTypeExt6db, 2, 4,
- HotplugDisabled,
- PcieGenMaxSupported,
- PcieGenMaxSupported,
- AspmDisabled, 0x02, 0)
- },
- /* Initialize Port descriptor (PCIe port, Lanes 2, PCI Device Number 2, ...) */
- {
- 0,
- PCIE_ENGINE_DATA_INITIALIZER(PciePortEngine, 1, 1),
- PCIE_PORT_DATA_INITIALIZER_V2(PortEnabled, ChannelTypeExt6db, 2, 3,
- HotplugDisabled,
- PcieGenMaxSupported,
- PcieGenMaxSupported,
- AspmDisabled, 0x03, 0)
- },
- /* Initialize Port descriptor (PCIe port, Lanes 3, PCI Device Number 2, ...) */
- {
- 0,
- PCIE_ENGINE_DATA_INITIALIZER(PciePortEngine, 0, 0),
- PCIE_PORT_DATA_INITIALIZER_V2(PortEnabled, ChannelTypeExt6db, 2, 2,
- HotplugDisabled,
- PcieGenMaxSupported,
- PcieGenMaxSupported,
- AspmDisabled, 0x04, 0)
- },
- /* Initialize Port descriptor (PCIe port, Lanes 4-7, PCI Device Number 4, ...) */
- {
- DESCRIPTOR_TERMINATE_LIST,
- PCIE_ENGINE_DATA_INITIALIZER(PciePortEngine, 4, 7),
- PCIE_PORT_DATA_INITIALIZER_V2(PortEnabled, ChannelTypeExt6db, 2, 1,
- HotplugDisabled,
- PcieGenMaxSupported,
- PcieGenMaxSupported,
- AspmDisabled, 0x05, 0)
- }
-};
-
-static const PCIe_DDI_DESCRIPTOR DdiList[] = {
- /* DP0 to HDMI0/DP */
- {
- 0,
- PCIE_ENGINE_DATA_INITIALIZER(PcieDdiEngine, 8, 11),
- PCIE_DDI_DATA_INITIALIZER(ConnectorTypeDP, Aux1, Hdp1)
- },
- /* DP1 to FCH */
- {
- 0,
- PCIE_ENGINE_DATA_INITIALIZER(PcieDdiEngine, 12, 15),
- PCIE_DDI_DATA_INITIALIZER(ConnectorTypeDP, Aux2, Hdp2)
- },
- /* DP2 to HDMI1/DP */
- {
- DESCRIPTOR_TERMINATE_LIST,
- PCIE_ENGINE_DATA_INITIALIZER(PcieDdiEngine, 16, 19),
- PCIE_DDI_DATA_INITIALIZER(ConnectorTypeCrt, Aux3, Hdp3)
- },
-};
-
-static const PCIe_COMPLEX_DESCRIPTOR PcieComplex = {
- .Flags = DESCRIPTOR_TERMINATE_LIST,
- .SocketId = 0,
- .PciePortList = PortList,
- .DdiLinkList = DdiList
-};
-
-void board_BeforeInitReset(struct sysinfo *cb, AMD_RESET_PARAMS *Reset)
-{
- FCH_RESET_INTERFACE *FchReset = &Reset->FchInterface;
- FchReset->Xhci0Enable = CONFIG(HUDSON_XHCI_ENABLE);
- FchReset->Xhci1Enable = FALSE;
-}
-
-void board_BeforeInitEarly(struct sysinfo *cb, AMD_EARLY_PARAMS *InitEarly)
-{
- InitEarly->GnbConfig.PcieComplexList = &PcieComplex;
-}
-
-/*----------------------------------------------------------------------------------------
- * CUSTOMER OVERRIDES MEMORY TABLE
- *----------------------------------------------------------------------------------------
- */
-
-/*
- * Platform Specific Overriding Table allows IBV/OEM to pass in platform information to AGESA
- * (e.g. MemClk routing, the number of DIMM slots per channel,...). If PlatformSpecificTable
- * is populated, AGESA will base its settings on the data from the table. Otherwise, it will
- * use its default conservative settings.
- */
-static CONST PSO_ENTRY ROMDATA PlatformMemoryTable[] = {
- #define SEED_A 0x12
- HW_RXEN_SEED(
- ANY_SOCKET, CHANNEL_A, ALL_DIMMS,
- SEED_A, SEED_A, SEED_A, SEED_A, SEED_A, SEED_A, SEED_A, SEED_A,
- SEED_A),
-
- NUMBER_OF_DIMMS_SUPPORTED(ANY_SOCKET, ANY_CHANNEL, 2),
- NUMBER_OF_CHANNELS_SUPPORTED(ANY_SOCKET, 1),
- MOTHER_BOARD_LAYERS(LAYERS_4),
-
- MEMCLK_DIS_MAP(ANY_SOCKET, ANY_CHANNEL, 0x01, 0x02, 0x04, 0x08, 0x00, 0x00, 0x00, 0x00),
- CKE_TRI_MAP(ANY_SOCKET, ANY_CHANNEL, 0x01, 0x02, 0x04, 0x08), /* TODO: bit2map, bit3map */
- ODT_TRI_MAP(ANY_SOCKET, ANY_CHANNEL, 0x01, 0x02, 0x04, 0x08),
- CS_TRI_MAP(ANY_SOCKET, ANY_CHANNEL, 0x01, 0x02, 0x04, 0x08, 0x00, 0x00, 0x00, 0x00),
-
- PSO_END
-};
-
-void board_BeforeInitPost(struct sysinfo *cb, AMD_POST_PARAMS *InitPost)
-{
- InitPost->MemConfig.PlatformMemoryConfiguration = (PSO_ENTRY *)PlatformMemoryTable;
-}
-
-void board_BeforeInitMid(struct sysinfo *cb, AMD_MID_PARAMS *InitMid)
-{
- /* 0 iGpuVgaAdapter, 1 iGpuVgaNonAdapter; */
- InitMid->GnbMidConfiguration.iGpuVgaMode = 0;
-}
diff --git a/src/mainboard/biostar/a68n_5200/OptionsIds.h b/src/mainboard/biostar/a68n_5200/OptionsIds.h
deleted file mode 100644
index 130d8525ab..0000000000
--- a/src/mainboard/biostar/a68n_5200/OptionsIds.h
+++ /dev/null
@@ -1,38 +0,0 @@
-/* SPDX-License-Identifier: GPL-2.0-only */
-
-/**
- * @file
- *
- * IDS Option File
- *
- * This file is used to switch on/off IDS features.
- *
- */
-#ifndef _OPTION_IDS_H_
-#define _OPTION_IDS_H_
-
-/**
- *
- * This file generates the defaults tables for the Integrated Debug Support
- * Module. The documented build options are imported from a user controlled
- * file for processing. The build options for the Integrated Debug Support
- * Module are listed below:
- *
- * IDSOPT_IDS_ENABLED
- * IDSOPT_ERROR_TRAP_ENABLED
- * IDSOPT_CONTROL_ENABLED
- * IDSOPT_TRACING_ENABLED
- * IDSOPT_PERF_ANALYSIS
- * IDSOPT_ASSERT_ENABLED
- * IDSOPT_CAR_CORRUPTION_CHECK_ENABLED
- *
- **/
-
-#define IDSOPT_IDS_ENABLED TRUE
-//#define IDSOPT_CONTROL_ENABLED TRUE
-//#define IDSOPT_TRACING_ENABLED TRUE
-#define IDSOPT_TRACING_CONSOLE_SERIALPORT TRUE
-//#define IDSOPT_PERF_ANALYSIS TRUE
-#define IDSOPT_ASSERT_ENABLED TRUE
-
-#endif
diff --git a/src/mainboard/biostar/a68n_5200/acpi/AmdImc.asl b/src/mainboard/biostar/a68n_5200/acpi/AmdImc.asl
deleted file mode 100644
index 44838347dc..0000000000
--- a/src/mainboard/biostar/a68n_5200/acpi/AmdImc.asl
+++ /dev/null
@@ -1,97 +0,0 @@
-/* SPDX-License-Identifier: GPL-2.0-only */
-
-//BTDC Due to IMC Fan, ACPI control codes
-OperationRegion(IMIO, SystemIO, 0x3E, 0x02)
-Field(IMIO , ByteAcc, NoLock, Preserve) {
- IMCX,8,
- IMCA,8
-}
-
-IndexField(IMCX, IMCA, ByteAcc, NoLock, Preserve) {
- Offset(0x80),
- MSTI, 8,
- MITS, 8,
- MRG0, 8,
- MRG1, 8,
- MRG2, 8,
- MRG3, 8,
-}
-
-Method(WACK, 0)
-{
- Local0 = 0
- While (Local0 != 0xfa) {
- Local0 = MRG0
- Sleep(10)
- }
-}
-
-//Init
-Method (ITZE, 0)
-{
- MRG0 = 0
- MRG1 = 0xb5
- MRG2 = 0
- MSTI = 0x96
- WACK()
-
- MRG0 = 0
- MRG1 = 0
- MRG2 = 0
- MSTI = 0x80
- WACK()
-
- Local0 = MRG2 | 0x01
-
- MRG0 = 0
- MRG1 = 0
- MRG2 = Local0
- MSTI = 0x81
- WACK()
-}
-
-//Sleep
-Method (IMSP, 0)
-{
- MRG0 = 0
- MRG1 = 0xb5
- MRG2 = 0
- MSTI = 0x96
- WACK()
-
- MRG0 = 0
- MRG1 = 1
- MRG2 = 0
- MSTI = 0x98
- WACK()
-
- MRG0 = 0
- MRG1 = 0xb4
- MRG2 = 0
- MSTI = 0x96
- WACK()
-}
-
-//Wake
-Method (IMWK, 0)
-{
- MRG0 = 0
- MRG1 = 0xb5
- MRG2 = 0
- MSTI = 0x96
- WACK()
-
- MRG0 = 0
- MRG1 = 0
- MRG2 = 0
- MSTI = 0x80
- WACK()
-
- Local0 = MRG2 | 0x01
-
- MRG0 = 0
- MRG1 = 0
- MRG2 = Local0
- MSTI = 0x81
- WACK()
-}
diff --git a/src/mainboard/biostar/a68n_5200/acpi/gpe.asl b/src/mainboard/biostar/a68n_5200/acpi/gpe.asl
deleted file mode 100644
index 778c7f73be..0000000000
--- a/src/mainboard/biostar/a68n_5200/acpi/gpe.asl
+++ /dev/null
@@ -1,61 +0,0 @@
-/* SPDX-License-Identifier: GPL-2.0-only */
-
-Scope(\_GPE) { /* Start Scope GPE */
-
- /* General event 3 */
- Method(_L03) {
- /* DBGO("\\_GPE\\_L00\n") */
- Notify(\_SB.PWRB, 0x02) /* NOTIFY_DEVICE_WAKE */
- }
-
- /* Legacy PM event */
- Method(_L08) {
- /* DBGO("\\_GPE\\_L08\n") */
- }
-
- /* Temp warning (TWarn) event */
- Method(_L09) {
- /* DBGO("\\_GPE\\_L09\n") */
- /* Notify (\_TZ.TZ00, 0x80) */
- }
-
- /* USB controller PME# */
- Method(_L0B) {
- /* DBGO("\\_GPE\\_L0B\n") */
- Notify(\_SB.PCI0.UOH1, 0x02) /* NOTIFY_DEVICE_WAKE */
- Notify(\_SB.PCI0.UOH2, 0x02) /* NOTIFY_DEVICE_WAKE */
- Notify(\_SB.PCI0.UOH3, 0x02) /* NOTIFY_DEVICE_WAKE */
- Notify(\_SB.PCI0.UOH4, 0x02) /* NOTIFY_DEVICE_WAKE */
- Notify(\_SB.PCI0.UOH5, 0x02) /* NOTIFY_DEVICE_WAKE */
- Notify(\_SB.PCI0.UOH6, 0x02) /* NOTIFY_DEVICE_WAKE */
- Notify(\_SB.PCI0.XHC0, 0x02) /* NOTIFY_DEVICE_WAKE */
- Notify(\_SB.PWRB, 0x02) /* NOTIFY_DEVICE_WAKE */
- }
-
- /* ExtEvent0 SCI event */
- Method(_L10) {
- /* DBGO("\\_GPE\\_L10\n") */
- }
-
- /* ExtEvent1 SCI event */
- Method(_L11) {
- /* DBGO("\\_GPE\\_L11\n") */
- }
-
- /* GPIO0 or GEvent8 event */
- Method(_L18) {
- /* DBGO("\\_GPE\\_L18\n") */
- Notify(\_SB.PCI0.PBR4, 0x02) /* NOTIFY_DEVICE_WAKE */
- Notify(\_SB.PCI0.PBR5, 0x02) /* NOTIFY_DEVICE_WAKE */
- Notify(\_SB.PCI0.PBR6, 0x02) /* NOTIFY_DEVICE_WAKE */
- Notify(\_SB.PCI0.PBR7, 0x02) /* NOTIFY_DEVICE_WAKE */
- Notify(\_SB.PWRB, 0x02) /* NOTIFY_DEVICE_WAKE */
- }
-
- /* Azalia SCI event */
- Method(_L1B) {
- /* DBGO("\\_GPE\\_L1B\n") */
- Notify(\_SB.PCI0.AZHD, 0x02) /* NOTIFY_DEVICE_WAKE */
- Notify(\_SB.PWRB, 0x02) /* NOTIFY_DEVICE_WAKE */
- }
-} /* End Scope GPE */
diff --git a/src/mainboard/biostar/a68n_5200/acpi/mainboard.asl b/src/mainboard/biostar/a68n_5200/acpi/mainboard.asl
deleted file mode 100644
index 9b18e722c7..0000000000
--- a/src/mainboard/biostar/a68n_5200/acpi/mainboard.asl
+++ /dev/null
@@ -1,9 +0,0 @@
-/* SPDX-License-Identifier: GPL-2.0-only */
-
-
-/* AcpiGpe0Blk */
-OperationRegion(GP0B, SystemMemory, 0xfed80814, 0x04)
- Field(GP0B, ByteAcc, NoLock, Preserve) {
- , 11,
- USBS, 1,
-}
diff --git a/src/mainboard/biostar/a68n_5200/acpi/routing.asl b/src/mainboard/biostar/a68n_5200/acpi/routing.asl
deleted file mode 100644
index 9bce4b2163..0000000000
--- a/src/mainboard/biostar/a68n_5200/acpi/routing.asl
+++ /dev/null
@@ -1,169 +0,0 @@
-/* SPDX-License-Identifier: GPL-2.0-only */
-
-/* Routing is in System Bus scope */
-Name(PR0, Package(){
- /* NB devices */
- /* Bus 0, Dev 0 - F16 Host Controller */
-
- /* Bus 0, Dev 1 - PCI Bridge for Internal Graphics(IGP) */
- /* Bus 0, Dev 1, Func 1 - HDMI Audio Controller */
- Package(){0x0001FFFF, 0, INTB, 0 },
- Package(){0x0001FFFF, 1, INTC, 0 },
-
- /* Bus 0, Dev 2 Func 0,1,2,3,4,5 - PCIe Bridges */
- Package(){0x0002FFFF, 0, INTC, 0 },
- Package(){0x0002FFFF, 1, INTD, 0 },
- Package(){0x0002FFFF, 2, INTA, 0 },
- Package(){0x0002FFFF, 3, INTB, 0 },
-
- /* FCH devices */
- /* Bus 0, Dev 20 - F0:SMBus/ACPI,F2:HDAudio;F3:LPC;F7:SD */
- Package(){0x0014FFFF, 0, INTA, 0 },
- Package(){0x0014FFFF, 1, INTB, 0 },
- Package(){0x0014FFFF, 2, INTC, 0 },
- Package(){0x0014FFFF, 3, INTD, 0 },
-
- /* Bus 0, Dev 18, 19, 22 Func 0 - USB: OHCI */
- /* Bus 0, Dev 18, 19, 22 Func 1 - USB: EHCI */
- Package(){0x0012FFFF, 0, INTC, 0 },
- Package(){0x0012FFFF, 1, INTB, 0 },
-
- Package(){0x0013FFFF, 0, INTC, 0 },
- Package(){0x0013FFFF, 1, INTB, 0 },
-
- Package(){0x0016FFFF, 0, INTC, 0 },
- Package(){0x0016FFFF, 1, INTB, 0 },
-
- /* Bus 0, Dev 10 - USB: XHCI func 0, 1 */
- Package(){0x0010FFFF, 0, INTC, 0 },
- Package(){0x0010FFFF, 1, INTB, 0 },
-
- /* Bus 0, Dev 17 - SATA controller */
- Package(){0x0011FFFF, 0, INTD, 0 },
-
-})
-
-Name(APR0, Package(){
- /* NB devices in APIC mode */
- /* Bus 0, Dev 0 - F15 Host Controller */
-
- /* Bus 0, Dev 1 - PCI Bridge for Internal Graphics(IGP) */
- Package(){0x0001FFFF, 0, 0, 44 },
- Package(){0x0001FFFF, 1, 0, 45 },
-
- /* Bus 0, Dev 2 - PCIe Bridges */
- Package(){0x0002FFFF, 0, 0, 24 },
- Package(){0x0002FFFF, 1, 0, 25 },
- Package(){0x0002FFFF, 2, 0, 26 },
- Package(){0x0002FFFF, 3, 0, 27 },
-
- /* SB devices in APIC mode */
- /* Bus 0, Dev 20 - F0:SMBus/ACPI,F2:HDAudio;F3:LPC;F7:SD */
- Package(){0x0014FFFF, 0, 0, 16 },
- Package(){0x0014FFFF, 1, 0, 17 },
- Package(){0x0014FFFF, 2, 0, 18 },
- Package(){0x0014FFFF, 3, 0, 19 },
-
- /* Bus 0, Dev 18, 19, 22 Func 0 - USB: OHCI */
- /* Bus 0, Dev 18, 19, 22 Func 1 - USB: EHCI */
- Package(){0x0012FFFF, 0, 0, 18 },
- Package(){0x0012FFFF, 1, 0, 17 },
-
- Package(){0x0013FFFF, 0, 0, 18 },
- Package(){0x0013FFFF, 1, 0, 17 },
-
- Package(){0x0016FFFF, 0, 0, 18 },
- Package(){0x0016FFFF, 1, 0, 17 },
-
- /* Bus 0, Dev 10 - USB: XHCI func 0, 1 */
- Package(){0x0010FFFF, 0, 0, 0x12},
- Package(){0x0010FFFF, 1, 0, 0x11},
-
- /* Bus 0, Dev 17 - SATA controller */
- Package(){0x0011FFFF, 0, 0, 19 },
-
-})
-
-Name(PS2, Package(){
- Package(){0x0000FFFF, 0, INTC, 0 },
- Package(){0x0000FFFF, 1, INTD, 0 },
- Package(){0x0000FFFF, 2, INTA, 0 },
- Package(){0x0000FFFF, 3, INTB, 0 },
-})
-Name(APS2, Package(){
- Package(){0x0000FFFF, 0, 0, 18 },
- Package(){0x0000FFFF, 1, 0, 19 },
- Package(){0x0000FFFF, 2, 0, 16 },
- Package(){0x0000FFFF, 3, 0, 17 },
-})
-
-/* GFX */
-Name(PS4, Package(){
- Package(){0x0000FFFF, 0, INTA, 0 },
- Package(){0x0000FFFF, 1, INTB, 0 },
- Package(){0x0000FFFF, 2, INTC, 0 },
- Package(){0x0000FFFF, 3, INTD, 0 },
-})
-Name(APS4, Package(){
- /* PCIe slot - Hooked to PCIe slot 4 */
- Package(){0x0000FFFF, 0, 0, 24 },
- Package(){0x0000FFFF, 1, 0, 25 },
- Package(){0x0000FFFF, 2, 0, 26 },
- Package(){0x0000FFFF, 3, 0, 27 },
-})
-
-/* GPP 0 */
-Name(PS5, Package(){
- Package(){0x0000FFFF, 0, INTB, 0 },
- Package(){0x0000FFFF, 1, INTC, 0 },
- Package(){0x0000FFFF, 2, INTD, 0 },
- Package(){0x0000FFFF, 3, INTA, 0 },
-})
-Name(APS5, Package(){
- Package(){0x0000FFFF, 0, 0, 28 },
- Package(){0x0000FFFF, 1, 0, 29 },
- Package(){0x0000FFFF, 2, 0, 30 },
- Package(){0x0000FFFF, 3, 0, 31 },
-})
-
-/* GPP 1 */
-Name(PS6, Package(){
- Package(){0x0000FFFF, 0, INTC, 0 },
- Package(){0x0000FFFF, 1, INTD, 0 },
- Package(){0x0000FFFF, 2, INTA, 0 },
- Package(){0x0000FFFF, 3, INTB, 0 },
-})
-Name(APS6, Package(){
- Package(){0x0000FFFF, 0, 0, 32 },
- Package(){0x0000FFFF, 1, 0, 33 },
- Package(){0x0000FFFF, 2, 0, 34 },
- Package(){0x0000FFFF, 3, 0, 35 },
-})
-
-/* GPP 2 */
-Name(PS7, Package(){
- Package(){0x0000FFFF, 0, INTD, 0 },
- Package(){0x0000FFFF, 1, INTA, 0 },
- Package(){0x0000FFFF, 2, INTB, 0 },
- Package(){0x0000FFFF, 3, INTC, 0 },
-})
-Name(APS7, Package(){
- Package(){0x0000FFFF, 0, 0, 36 },
- Package(){0x0000FFFF, 1, 0, 37 },
- Package(){0x0000FFFF, 2, 0, 38 },
- Package(){0x0000FFFF, 3, 0, 39 },
-})
-
-/* GPP 3 */
-Name(PS8, Package(){
- Package(){0x0000FFFF, 0, INTA, 0 },
- Package(){0x0000FFFF, 1, INTB, 0 },
- Package(){0x0000FFFF, 2, INTC, 0 },
- Package(){0x0000FFFF, 3, INTD, 0 },
-})
-Name(APS8, Package(){
- Package(){0x0000FFFF, 0, 0, 40 },
- Package(){0x0000FFFF, 1, 0, 41 },
- Package(){0x0000FFFF, 2, 0, 42 },
- Package(){0x0000FFFF, 3, 0, 43 },
-})
diff --git a/src/mainboard/biostar/a68n_5200/acpi/sata.asl b/src/mainboard/biostar/a68n_5200/acpi/sata.asl
deleted file mode 100644
index 659a076e19..0000000000
--- a/src/mainboard/biostar/a68n_5200/acpi/sata.asl
+++ /dev/null
@@ -1,3 +0,0 @@
-/* SPDX-License-Identifier: GPL-2.0-only */
-
-/* No SATA functionality */
diff --git a/src/mainboard/biostar/a68n_5200/acpi/sleep.asl b/src/mainboard/biostar/a68n_5200/acpi/sleep.asl
deleted file mode 100644
index fc26c306d9..0000000000
--- a/src/mainboard/biostar/a68n_5200/acpi/sleep.asl
+++ /dev/null
@@ -1,64 +0,0 @@
-/* SPDX-License-Identifier: GPL-2.0-only */
-
-/* Wake status package */
-Name(WKST,Package(){Zero, Zero})
-
-/*
-* \_PTS - Prepare to Sleep method
-*
-* Entry:
-* Arg0=The value of the sleeping state S1=1, S2=2, etc
-*
-* Exit:
-* -none-
-*
-* The _PTS control method is executed at the beginning of the sleep process
-* for S1-S5. The sleeping value is passed to the _PTS control method. This
-* control method may be executed a relatively long time before entering the
-* sleep state and the OS may abort the operation without notification to
-* the ACPI driver. This method cannot modify the configuration or power
-* state of any device in the system.
-*/
-
-External(\_SB.APTS, MethodObj)
-External(\_SB.AWAK, MethodObj)
-
-Method(_PTS, 1) {
- /* DBGO("\\_PTS\n") */
- /* DBGO("From S0 to S") */
- /* DBGO(Arg0) */
- /* DBGO("\n") */
-
- /* Clear wake status structure. */
- WKST [0] = 0
- WKST [1] = 0
- UPWS = 7
- \_SB.APTS(Arg0)
-} /* End Method(\_PTS) */
-
-/*
-* \_WAK System Wake method
-*
-* Entry:
-* Arg0=The value of the sleeping state S1=1, S2=2
-*
-* Exit:
-* Return package of 2 DWords
-* Dword 1 - Status
-* 0x00000000 wake succeeded
-* 0x00000001 Wake was signaled but failed due to lack of power
-* 0x00000002 Wake was signaled but failed due to thermal condition
-* Dword 2 - Power Supply state
-* if non-zero the effective S-state the power supply entered
-*/
-Method(\_WAK, 1) {
- /* DBGO("\\_WAK\n") */
- /* DBGO("From S") */
- /* DBGO(Arg0) */
- /* DBGO(" to S0\n") */
- USBS = 1
-
- \_SB.AWAK(Arg0)
-
- Return(WKST)
-} /* End Method(\_WAK) */
diff --git a/src/mainboard/biostar/a68n_5200/acpi/superio.asl b/src/mainboard/biostar/a68n_5200/acpi/superio.asl
deleted file mode 100644
index 16990d45f4..0000000000
--- a/src/mainboard/biostar/a68n_5200/acpi/superio.asl
+++ /dev/null
@@ -1,3 +0,0 @@
-/* SPDX-License-Identifier: CC-PDDC */
-
-/* Please update the license if adding licensable material. */
diff --git a/src/mainboard/biostar/a68n_5200/acpi/thermal.asl b/src/mainboard/biostar/a68n_5200/acpi/thermal.asl
deleted file mode 100644
index 16990d45f4..0000000000
--- a/src/mainboard/biostar/a68n_5200/acpi/thermal.asl
+++ /dev/null
@@ -1,3 +0,0 @@
-/* SPDX-License-Identifier: CC-PDDC */
-
-/* Please update the license if adding licensable material. */
diff --git a/src/mainboard/biostar/a68n_5200/acpi/usb_oc.asl b/src/mainboard/biostar/a68n_5200/acpi/usb_oc.asl
deleted file mode 100644
index a5846fe848..0000000000
--- a/src/mainboard/biostar/a68n_5200/acpi/usb_oc.asl
+++ /dev/null
@@ -1,13 +0,0 @@
-/* SPDX-License-Identifier: GPL-2.0-only */
-
-/* USB overcurrent mapping pins. */
-Name(UOM0, 0)
-Name(UOM1, 2)
-Name(UOM2, 0)
-Name(UOM3, 7)
-Name(UOM4, 2)
-Name(UOM5, 2)
-Name(UOM6, 6)
-Name(UOM7, 2)
-Name(UOM8, 6)
-Name(UOM9, 6)
diff --git a/src/mainboard/biostar/a68n_5200/board_info.txt b/src/mainboard/biostar/a68n_5200/board_info.txt
deleted file mode 100644
index b351b8e696..0000000000
--- a/src/mainboard/biostar/a68n_5200/board_info.txt
+++ /dev/null
@@ -1 +0,0 @@
-Category: eval
diff --git a/src/mainboard/biostar/a68n_5200/bootblock.c b/src/mainboard/biostar/a68n_5200/bootblock.c
deleted file mode 100644
index 5920199775..0000000000
--- a/src/mainboard/biostar/a68n_5200/bootblock.c
+++ /dev/null
@@ -1,51 +0,0 @@
-/* SPDX-License-Identifier: GPL-2.0-only */
-
-#include <amdblocks/acpimmio.h>
-#include <bootblock_common.h>
-#include <stdint.h>
-#include <device/pci_ops.h>
-#include <superio/ite/common/ite.h>
-#include <superio/ite/it8728f/it8728f.h>
-
-#define SERIAL_DEV PNP_DEV(0x2e, IT8728F_SP1)
-#define GPIO_DEV PNP_DEV(0x2e, IT8728F_GPIO)
-#define CLKIN_DEV PNP_DEV(0x2e, IT8728F_GPIO)
-
-static void sbxxx_enable_48mhzout(void)
-{
- u32 reg32;
-
- /* Set auxiliary output clock frequency on OSCOUT1 pin to be 48MHz */
- reg32 = misc_read32(0x28);
- reg32 &= 0xfff8ffff;
- misc_write32(0x28, reg32);
-
- /* Enable Auxiliary Clock1, disable FCH 14 MHz OscClk */
- reg32 = misc_read32(0x40);
- reg32 &= 0xffffbffb;
- misc_write32(0x40, reg32);
-}
-
-void bootblock_mainboard_early_init(void)
-{
- /* Enable the AcpiMmio space */
- pm_io_write8(0x24, 1);
-
- /* Set LPC decode enables. */
- const pci_devfn_t dev = PCI_DEV(0, 0x14, 3);
- pci_write_config32(dev, 0x44, 0xff03ffd5);
-
- /* enable SIO LPC decode at 0x2e/2f */
- pci_or_config8(dev, 0x48, 3);
-
- /* enable serial decode at 0x3f8 */
- pci_or_config8(dev, 0x44, 1 << 6);
-
- /* enable SIO clock */
- sbxxx_enable_48mhzout();
-
- /* Enable serial output on it8728f */
- ite_conf_clkin(CLKIN_DEV, ITE_UART_CLK_PREDIVIDE_48);
- ite_kill_watchdog(GPIO_DEV);
- ite_enable_serial(SERIAL_DEV, CONFIG_TTYS0_BASE);
-}
diff --git a/src/mainboard/biostar/a68n_5200/buildOpts.c b/src/mainboard/biostar/a68n_5200/buildOpts.c
deleted file mode 100644
index f5c21819b4..0000000000
--- a/src/mainboard/biostar/a68n_5200/buildOpts.c
+++ /dev/null
@@ -1,45 +0,0 @@
-/* SPDX-License-Identifier: GPL-2.0-only */
-
-#include <AGESA.h>
-
-#define INSTALL_FT3_SOCKET_SUPPORT TRUE
-#define INSTALL_FAMILY_16_MODEL_0x_SUPPORT TRUE
-
-//#define BLDOPT_REMOVE_UDIMMS_SUPPORT TRUE
-//#define BLDOPT_REMOVE_RDIMMS_SUPPORT TRUE
-#define BLDOPT_REMOVE_LRDIMMS_SUPPORT TRUE
-//#define BLDOPT_REMOVE_ECC_SUPPORT TRUE
-#define BLDOPT_REMOVE_SRAT FALSE
-#define BLDOPT_REMOVE_WHEA FALSE
-#define BLDOPT_REMOVE_CRAT TRUE
-#define BLDOPT_REMOVE_CDIT TRUE
-
-/* Build configuration values here. */
-#define BLDCFG_VRM_NB_LOW_POWER_THRESHOLD 0
-
-#define BLDCFG_AMD_PLATFORM_TYPE AMD_PLATFORM_MOBILE
-
-#define BLDCFG_MEMORY_RDIMM_CAPABLE FALSE
-#define BLDCFG_MEMORY_UDIMM_CAPABLE TRUE
-#define BLDCFG_MEMORY_SODIMM_CAPABLE TRUE
-#define BLDCFG_MEMORY_CHANNEL_INTERLEAVING TRUE
-#define BLDCFG_ENABLE_ECC_FEATURE TRUE
-#define BLDCFG_ECC_SYNC_FLOOD TRUE
-#define BLDCFG_IOMMU_SUPPORT FALSE
-
-#define BLDCFG_CFG_GNB_HD_AUDIO TRUE
-
-/* Include the files that instantiate the configuration definitions. */
-#include "cpuRegisters.h"
-#include "cpuFamRegisters.h"
-#include "cpuFamilyTranslation.h"
-#include "AdvancedApi.h"
-#include "heapManager.h"
-#include "CreateStruct.h"
-#include "cpuFeatures.h"
-#include "Table.h"
-#include "cpuEarlyInit.h"
-#include "cpuLateInit.h"
-#include "GnbInterface.h"
-
-#include <PlatformInstall.h>
diff --git a/src/mainboard/biostar/a68n_5200/cmos.layout b/src/mainboard/biostar/a68n_5200/cmos.layout
deleted file mode 100644
index a11e1dd0e6..0000000000
--- a/src/mainboard/biostar/a68n_5200/cmos.layout
+++ /dev/null
@@ -1,35 +0,0 @@
-#*****************************************************************************
-# SPDX-License-Identifier: GPL-2.0-only
-
-#*****************************************************************************
-
-entries
-
-0 384 r 0 reserved_memory
-384 1 e 4 boot_option
-388 4 h 0 reboot_counter
-400 1 e 1 power_on_after_fail
-412 4 e 6 debug_level
-444 1 e 1 nmi
-728 256 h 0 user_data
-984 16 h 0 check_sum
-# Reserve the extended AMD configuration registers
-1000 24 r 0 amd_reserved
-
-enumerations
-
-#ID value text
-1 0 Disable
-1 1 Enable
-2 0 Enable
-2 1 Disable
-4 0 Fallback
-4 1 Normal
-6 5 Notice
-6 6 Info
-6 7 Debug
-6 8 Spew
-
-checksums
-
-checksum 392 983 984
diff --git a/src/mainboard/biostar/a68n_5200/devicetree.cb b/src/mainboard/biostar/a68n_5200/devicetree.cb
deleted file mode 100644
index c036b65259..0000000000
--- a/src/mainboard/biostar/a68n_5200/devicetree.cb
+++ /dev/null
@@ -1,86 +0,0 @@
-# SPDX-License-Identifier: GPL-2.0-only
-
-chip northbridge/amd/agesa/family16kb/root_complex
- device cpu_cluster 0 on
- chip cpu/amd/agesa/family16kb
- device lapic 0 on end
- end
- end
-
- device domain 0 on
- subsystemid 0x1022 0x1410 inherit
- chip northbridge/amd/agesa/family16kb
- device pci 0.0 on end # Root Complex
- device pci 1.0 on end # Internal Graphics P2P bridge 0x9804
- device pci 1.1 on end # Internal Multimedia
- device pci 2.0 on end # PCIe Host Bridge
- device pci 2.1 on end # x4 PCIe slot
- device pci 2.2 off end # mPCIe slot
- device pci 2.3 off end # Realtek NIC
- device pci 2.4 off end # Edge Connector
- device pci 2.5 off end # Edge Connector
- end #chip northbridge/amd/agesa/family16kb
-
- chip southbridge/amd/agesa/hudson # it is under NB/SB Link, but on the same pci bus
- device pci 10.0 on end # XHCI HC0
- device pci 11.0 on end # SATA
- device pci 12.0 on end # USB
- device pci 12.2 on end # USB
- device pci 13.0 on end # USB
- device pci 13.2 on end # USB
- device pci 14.0 on end # SM
- device pci 14.2 on end # HDA 0x4383
- device pci 14.3 on # LPC 0x439d
- chip superio/ite/it8728f
- #register "multi_function_register_1" = "0x01"
- device pnp 2e.0 off end # Floppy
- device pnp 2e.1 on # COM1
- io 0x60 = 0x3f8
- irq 0x70 = 4
- end
- device pnp 2e.2 off end # COM2
- device pnp 2e.3 on # Parallel Port
- io 0x60 = 0x378
- irq 0x70 = 5
- drq 0x74 = 4
- end
- device pnp 2e.4 on # Hardware Monitor
- io 0x60 = 0xa00
- io 0x62 = 0xa20
- irq 0x70 = 0
- irq 0xf1 = 0x00
- irq 0xf2 = 0x04
- irq 0xf3 = 0xa0
- irq 0xf5 = 0x0f
- irq 0xf9 = 0xa0
- irq 0xfa = 0x04
- end
- device pnp 2e.5 on # KBC
- io 0x60 = 0x60
- end
- device pnp 2e.6 off end # KBC?
- device pnp 2e.7 off end # GPIO
- device pnp 2e.8 off end
- device pnp 2e.9 off end
- device pnp 2e.a off end # IR
- end # ITE IT8728F
- end #LPC
- device pci 14.7 off end # SD
- end #chip southbridge/amd/agesa/hudson
-
- chip northbridge/amd/agesa/family16kb
- device pci 18.0 on end
- device pci 18.1 on end
- device pci 18.2 on end
- device pci 18.3 on end
- device pci 18.4 on end
- device pci 18.5 on end
- register "spdAddrLookup" = "
- {
- { {0xA0, 0xA2}, {0x00, 0x00}, }, // socket 0 - Channel 0 & 1 - 8-bit SPD addresses
- { {0x00, 0x00}, {0x00, 0x00}, }, // socket 1 - Channel 0 & 1 - 8-bit SPD addresses
- }"
- end
-
- end #domain
-end #northbridge/amd/agesa/family16kb/root_complex
diff --git a/src/mainboard/biostar/a68n_5200/dsdt.asl b/src/mainboard/biostar/a68n_5200/dsdt.asl
deleted file mode 100644
index c86cf27f67..0000000000
--- a/src/mainboard/biostar/a68n_5200/dsdt.asl
+++ /dev/null
@@ -1,71 +0,0 @@
-/* SPDX-License-Identifier: GPL-2.0-only */
-
-/* DefinitionBlock Statement */
-#include <acpi/acpi.h>
-DefinitionBlock (
- "dsdt.aml",
- "DSDT",
- ACPI_DSDT_REV_2,
- OEM_ID,
- ACPI_TABLE_CREATOR,
- 0x00010001 /* OEM Revision */
- )
-{ /* Start of ASL file */
- #include <acpi/dsdt_top.asl>
-
- /* Globals for the platform */
- #include "acpi/mainboard.asl"
-
- /* Describe the USB Overcurrent pins */
- #include "acpi/usb_oc.asl"
-
- /* PCI IRQ mapping for the Southbridge */
- #include <southbridge/amd/agesa/hudson/acpi/pcie.asl>
-
- /* Describe the processor tree (\_SB) */
- #include <cpu/amd/agesa/family16kb/acpi/cpu.asl>
-
- /* Contains the supported sleep states for this chipset */
- #include <southbridge/amd/common/acpi/sleepstates.asl>
-
- /* Contains the Sleep methods (WAK, PTS, GTS, etc.) */
- #include "acpi/sleep.asl"
-
- /* System Bus */
- Scope(\_SB) { /* Start \_SB scope */
- /* global utility methods expected within the \_SB scope */
- #include <arch/x86/acpi/globutil.asl>
-
- /* Describe IRQ Routing mapping for this platform (within the \_SB scope) */
- #include "acpi/routing.asl"
-
- Device(PWRB) {
- Name(_HID, EISAID("PNP0C0C"))
- Name(_UID, 0xAA)
- Name(_PRW, Package () {3, 0x04})
- Name(_STA, 0x0B)
- }
-
- Device(PCI0) {
- /* Describe the AMD Northbridge */
- #include <northbridge/amd/agesa/family16kb/acpi/northbridge.asl>
-
- /* Describe the AMD Fusion Controller Hub Southbridge */
- #include <southbridge/amd/agesa/hudson/acpi/fch.asl>
- }
-
- /* Describe PCI INT[A-H] for the Southbridge */
- #include <southbridge/amd/agesa/hudson/acpi/pci_int.asl>
-
- } /* End \_SB scope */
-
- /* Describe SMBUS for the Southbridge */
- #include <southbridge/amd/agesa/hudson/acpi/smbus.asl>
-
- /* Define the General Purpose Events for the platform */
- #include "acpi/gpe.asl"
-
- /* Define the Thermal zones and methods for the platform */
- #include "acpi/thermal.asl"
-}
-/* End of ASL file */
diff --git a/src/mainboard/biostar/a68n_5200/irq_tables.c b/src/mainboard/biostar/a68n_5200/irq_tables.c
deleted file mode 100644
index 3417541daa..0000000000
--- a/src/mainboard/biostar/a68n_5200/irq_tables.c
+++ /dev/null
@@ -1,88 +0,0 @@
-/* SPDX-License-Identifier: GPL-2.0-only */
-
-#include <console/console.h>
-#include <commonlib/bsd/helpers.h>
-#include <string.h>
-#include <stdint.h>
-#include <device/pci_def.h>
-#include <arch/pirq_routing.h>
-
-static void write_pirq_info(struct irq_info *pirq_info, u8 bus, u8 devfn,
- u8 link0, u16 bitmap0, u8 link1, u16 bitmap1,
- u8 link2, u16 bitmap2, u8 link3, u16 bitmap3,
- u8 slot, u8 rfu)
-{
- pirq_info->bus = bus;
- pirq_info->devfn = devfn;
- pirq_info->irq[0].link = link0;
- pirq_info->irq[0].bitmap = bitmap0;
- pirq_info->irq[1].link = link1;
- pirq_info->irq[1].bitmap = bitmap1;
- pirq_info->irq[2].link = link2;
- pirq_info->irq[2].bitmap = bitmap2;
- pirq_info->irq[3].link = link3;
- pirq_info->irq[3].bitmap = bitmap3;
- pirq_info->slot = slot;
- pirq_info->rfu = rfu;
-}
-
-unsigned long write_pirq_routing_table(unsigned long addr)
-{
- struct irq_routing_table *pirq;
- struct irq_info *pirq_info;
- u32 slot_num;
- u8 *v;
-
- u8 sum = 0;
- int i;
-
- /* Align the table to be 16 byte aligned. */
- addr = ALIGN_UP(addr, 16);
-
- /* This table must be between 0xf0000 & 0x100000 */
- printk(BIOS_INFO, "Writing IRQ routing tables to 0x%lx...", addr);
-
- pirq = (void *)(addr);
- v = (u8 *) (addr);
-
- pirq->signature = PIRQ_SIGNATURE;
- pirq->version = PIRQ_VERSION;
-
- pirq->rtr_bus = 0;
- pirq->rtr_devfn = PCI_DEVFN(0x14, 4);
-
- pirq->exclusive_irqs = 0;
-
- pirq->rtr_vendor = 0x1002;
- pirq->rtr_device = 0x4384;
-
- pirq->miniport_data = 0;
-
- memset(pirq->rfu, 0, sizeof(pirq->rfu));
-
- pirq_info = (void *)(&pirq->checksum + 1);
- slot_num = 0;
-
- /* pci bridge */
- write_pirq_info(pirq_info, 0, PCI_DEVFN(0x14, 4),
- 0x1, 0xdef8, 0x2, 0xdef8, 0x3, 0xdef8, 0x4, 0xdef8, 0,
- 0);
- pirq_info++;
-
- slot_num++;
-
- pirq->size = 32 + 16 * slot_num;
-
- for (i = 0; i < pirq->size; i++)
- sum += v[i];
-
- sum = pirq->checksum - sum;
-
- if (sum != pirq->checksum) {
- pirq->checksum = sum;
- }
-
- printk(BIOS_INFO, "%s done.\n", __func__);
-
- return (unsigned long)pirq_info;
-}
diff --git a/src/mainboard/biostar/a68n_5200/mainboard.c b/src/mainboard/biostar/a68n_5200/mainboard.c
deleted file mode 100644
index 3ebc0c1cd5..0000000000
--- a/src/mainboard/biostar/a68n_5200/mainboard.c
+++ /dev/null
@@ -1,40 +0,0 @@
-/* SPDX-License-Identifier: GPL-2.0-only */
-
-#include <device/device.h>
-#include <southbridge/amd/common/amd_pci_util.h>
-
-static const u8 mainboard_picr_data[0x54] = {
- 0x03, 0x04, 0x05, 0x07, 0x0B, 0x0A, 0x1F, 0x1F, 0xFA, 0xF1, 0x00, 0x00, 0x1F, 0x1F, 0x1F, 0x1F,
- 0x1F, 0x1F, 0x1F, 0x03, 0x1F, 0x1F, 0x1F, 0x1F, 0x1F, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
- 0x1F, 0x1F, 0x1F, 0x1F, 0x1F, 0x1F, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
- 0x05, 0x04, 0x05, 0x04, 0x04, 0x05, 0x04, 0x05, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
- 0x04, 0x1F, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
- 0x03, 0x04, 0x05, 0x07
-};
-static const u8 mainboard_intr_data[0x54] = {
- 0x10, 0x11, 0x12, 0x13, 0x14, 0x15, 0x16, 0x17, 0x00, 0x00, 0x00, 0x00, 0x1F, 0x1F, 0x1F, 0x1F,
- 0x09, 0x1F, 0x1F, 0x10, 0x1F, 0x10, 0x1F, 0x10, 0x1F, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
- 0x05, 0x1F, 0x1F, 0x1F, 0x1F, 0x1F, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
- 0x12, 0x11, 0x12, 0x11, 0x12, 0x11, 0x12, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
- 0x11, 0x13, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
- 0x10, 0x11, 0x12, 0x13
-};
-
-/* PIRQ Setup */
-static void pirq_setup(void)
-{
- intr_data_ptr = mainboard_intr_data;
- picr_data_ptr = mainboard_picr_data;
-}
-
-/**********************************************
- * enable the dedicated function in mainboard.
- **********************************************/
-static void mainboard_enable(struct device *dev)
-{
- pirq_setup();
-}
-
-struct chip_operations mainboard_ops = {
- .enable_dev = mainboard_enable,
-};
diff --git a/src/mainboard/biostar/am1ml/BiosCallOuts.c b/src/mainboard/biostar/am1ml/BiosCallOuts.c
deleted file mode 100644
index 5803e03783..0000000000
--- a/src/mainboard/biostar/am1ml/BiosCallOuts.c
+++ /dev/null
@@ -1,113 +0,0 @@
-/* SPDX-License-Identifier: GPL-2.0-only */
-
-#include <device/azalia.h>
-#include <AGESA.h>
-#include <console/console.h>
-#include <northbridge/amd/agesa/BiosCallOuts.h>
-#include <northbridge/amd/agesa/state_machine.h>
-#include <FchPlatform.h>
-
-const BIOS_CALLOUT_STRUCT BiosCallouts[] =
-{
- {AGESA_DO_RESET, agesa_Reset },
- {AGESA_READ_SPD, agesa_ReadSpd },
- {AGESA_READ_SPD_RECOVERY, agesa_NoopUnsupported },
- {AGESA_RUNFUNC_ONAP, agesa_RunFuncOnAp },
- {AGESA_GET_IDS_INIT_DATA, agesa_EmptyIdsInitData },
- {AGESA_HOOKBEFORE_DQS_TRAINING, agesa_NoopSuccess },
- {AGESA_HOOKBEFORE_EXIT_SELF_REF, agesa_NoopSuccess },
- {AGESA_GNB_GFX_GET_VBIOS_IMAGE, agesa_GfxGetVbiosImage }
-};
-const int BiosCalloutsLen = ARRAY_SIZE(BiosCallouts);
-
-/**
- * CODEC Initialization Table for Azalia HD Audio using Realtek ALC662 chip (from linux, running under vendor bios)
- */
-const CODEC_ENTRY Alc662_VerbTbl[] =
-{
- { 0x14, 0x01014410 },
- { 0x15, 0x411111f0 },
- { 0x16, 0x411111f0 },
- { 0x18, 0x01a19c30 },
- { 0x19, 0x02a19c40 },
- { 0x1a, 0x0181343f },
- { 0x1b, 0x02214c20 },
- { 0x1c, 0x411111f0 },
- { 0x1d, 0x4004c601 },
- { 0x1e, 0x411111f0 },
- { 0xff, 0xffffffff }
-};
-
-static const CODEC_TBL_LIST CodecTableList[] =
-{
- {0x10ec0662, (CODEC_ENTRY*)&Alc662_VerbTbl[0]},
- {(UINT32)0x0FFFFFFFF, (CODEC_ENTRY*)0x0FFFFFFFFUL}
-};
-
-#define FAN_INPUT_INTERNAL_DIODE 0
-#define FAN_INPUT_TEMP0 1
-#define FAN_INPUT_TEMP1 2
-#define FAN_INPUT_TEMP2 3
-#define FAN_INPUT_TEMP3 4
-#define FAN_INPUT_TEMP0_FILTER 5
-#define FAN_INPUT_ZERO 6
-#define FAN_INPUT_DISABLED 7
-
-#define FAN_AUTOMODE (1 << 0)
-#define FAN_LINEARMODE (1 << 1)
-#define FAN_STEPMODE ~(1 << 1)
-#define FAN_POLARITY_HIGH (1 << 2)
-#define FAN_POLARITY_LOW ~(1 << 2)
-
-/* Normally, 4-wire fan runs at 25KHz and 3-wire fan runs at 100Hz */
-#define FREQ_28KHZ 0x0
-#define FREQ_25KHZ 0x1
-#define FREQ_23KHZ 0x2
-#define FREQ_21KHZ 0x3
-#define FREQ_29KHZ 0x4
-#define FREQ_18KHZ 0x5
-#define FREQ_100HZ 0xF7
-#define FREQ_87HZ 0xF8
-#define FREQ_58HZ 0xF9
-#define FREQ_44HZ 0xFA
-#define FREQ_35HZ 0xFB
-#define FREQ_29HZ 0xFC
-#define FREQ_22HZ 0xFD
-#define FREQ_14HZ 0xFE
-#define FREQ_11HZ 0xFF
-
-void board_FCH_InitReset(struct sysinfo *cb_NA, FCH_RESET_DATA_BLOCK *FchParams_reset)
-{
- FchParams_reset->LegacyFree = CONFIG(HUDSON_LEGACY_FREE);
- FchParams_reset->Mode = 6;
-}
-
-void board_FCH_InitEnv(struct sysinfo *cb_NA, FCH_DATA_BLOCK *FchParams_env)
-{
- /* Azalia Controller OEM Codec Table Pointer */
- FchParams_env->Azalia.AzaliaOemCodecTablePtr = (CODEC_TBL_LIST *)(&CodecTableList[0]);
-
- /* Fan Control */
- FchParams_env->Imc.ImcEnable = FALSE;
- FchParams_env->Hwm.HwMonitorEnable = FALSE;
- FchParams_env->Hwm.HwmFchtsiAutoPoll = FALSE;/* 1 enable, 0 disable TSI Auto Polling */
-
- FchParams_env->Sata.SataClass = CONFIG_HUDSON_SATA_MODE;
-
- switch ((SATA_CLASS)CONFIG_HUDSON_SATA_MODE) {
- case SataLegacyIde:
- case SataRaid:
- case SataAhci:
- case SataAhci7804:
- FchParams_env->Sata.SataIdeMode = FALSE;
- printk(BIOS_DEBUG, "AHCI or RAID or IDE = %x\n", CONFIG_HUDSON_SATA_MODE);
- break;
-
- case SataIde2Ahci:
- case SataIde2Ahci7804:
- default: /* SataNativeIde */
- FchParams_env->Sata.SataIdeMode = TRUE;
- printk(BIOS_DEBUG, "IDE2AHCI = %x\n", CONFIG_HUDSON_SATA_MODE);
- break;
- }
-}
diff --git a/src/mainboard/biostar/am1ml/Kconfig b/src/mainboard/biostar/am1ml/Kconfig
deleted file mode 100644
index a3d6e32b96..0000000000
--- a/src/mainboard/biostar/am1ml/Kconfig
+++ /dev/null
@@ -1,49 +0,0 @@
-# SPDX-License-Identifier: GPL-2.0-only
-
-if BOARD_BIOSTAR_AM1ML
-
-config IGNORE_IASL_MISSING_DEPENDENCY
- def_bool y
-
-config BOARD_SPECIFIC_OPTIONS
- def_bool y
- select BOARD_ROMSIZE_KB_4096
- select CPU_AMD_AGESA_FAMILY16_KB
- select FORCE_AM1_SOCKET_SUPPORT
- select GFXUMA
- select HAVE_OPTION_TABLE
- select HAVE_PIRQ_TABLE
- select HAVE_ACPI_RESUME
- select HAVE_ACPI_TABLES
- select NORTHBRIDGE_AMD_AGESA_FAMILY16_KB
- select SOUTHBRIDGE_AMD_AGESA_YANGTZE
- select DEFAULT_POST_ON_LPC
- select SUPERIO_ITE_IT8728F
-
-config MAINBOARD_DIR
- default "biostar/am1ml"
-
-config MAINBOARD_PART_NUMBER
- default "AM1ML"
-
-config HW_MEM_HOLE_SIZEK
- hex
- default 0x200000
-
-config MAX_CPUS
- int
- default 4
-
-config IRQ_SLOT_COUNT
- int
- default 10
-
-config ONBOARD_VGA_IS_PRIMARY
- bool
- default y
-
-config HUDSON_LEGACY_FREE
- bool
- default n
-
-endif # BOARD_BIOSTAR_AM1ML
diff --git a/src/mainboard/biostar/am1ml/Kconfig.name b/src/mainboard/biostar/am1ml/Kconfig.name
deleted file mode 100644
index da7a677c9e..0000000000
--- a/src/mainboard/biostar/am1ml/Kconfig.name
+++ /dev/null
@@ -1,2 +0,0 @@
-config BOARD_BIOSTAR_AM1ML
- bool"AM1ML"
diff --git a/src/mainboard/biostar/am1ml/Makefile.inc b/src/mainboard/biostar/am1ml/Makefile.inc
deleted file mode 100644
index 549801d78f..0000000000
--- a/src/mainboard/biostar/am1ml/Makefile.inc
+++ /dev/null
@@ -1,11 +0,0 @@
-# SPDX-License-Identifier: GPL-2.0-only
-
-bootblock-y += bootblock.c
-
-romstage-y += buildOpts.c
-romstage-y += BiosCallOuts.c
-romstage-y += OemCustomize.c
-
-ramstage-y += buildOpts.c
-ramstage-y += BiosCallOuts.c
-ramstage-y += OemCustomize.c
diff --git a/src/mainboard/biostar/am1ml/OemCustomize.c b/src/mainboard/biostar/am1ml/OemCustomize.c
deleted file mode 100644
index 1d94b5bcb4..0000000000
--- a/src/mainboard/biostar/am1ml/OemCustomize.c
+++ /dev/null
@@ -1,143 +0,0 @@
-/* SPDX-License-Identifier: GPL-2.0-only */
-
-#include <AGESA.h>
-#include <PlatformMemoryConfiguration.h>
-
-#include <northbridge/amd/agesa/state_machine.h>
-
-static const PCIe_PORT_DESCRIPTOR PortList[] = {
- {
- 0,
- PCIE_ENGINE_DATA_INITIALIZER(PciePortEngine, 3, 3),
- PCIE_PORT_DATA_INITIALIZER_V2(PortEnabled, ChannelTypeExt6db, 2, 5,
- HotplugDisabled,
- PcieGenMaxSupported,
- PcieGenMaxSupported,
- AspmDisabled, 0x01, 0)
- },
- /* Initialize Port descriptor (PCIe port, Lanes 1, PCI Device Number 2, ...) */
- {
- 0,
- PCIE_ENGINE_DATA_INITIALIZER(PciePortEngine, 2, 2),
- PCIE_PORT_DATA_INITIALIZER_V2(PortEnabled, ChannelTypeExt6db, 2, 4,
- HotplugDisabled,
- PcieGenMaxSupported,
- PcieGenMaxSupported,
- AspmDisabled, 0x02, 0)
- },
- /* Initialize Port descriptor (PCIe port, Lanes 2, PCI Device Number 2, ...) */
- {
- 0,
- PCIE_ENGINE_DATA_INITIALIZER(PciePortEngine, 1, 1),
- PCIE_PORT_DATA_INITIALIZER_V2(PortEnabled, ChannelTypeExt6db, 2, 3,
- HotplugDisabled,
- PcieGenMaxSupported,
- PcieGenMaxSupported,
- AspmDisabled, 0x03, 0)
- },
- /* Initialize Port descriptor (PCIe port, Lanes 3, PCI Device Number 2, ...) */
- {
- 0,
- PCIE_ENGINE_DATA_INITIALIZER(PciePortEngine, 0, 0),
- PCIE_PORT_DATA_INITIALIZER_V2(PortEnabled, ChannelTypeExt6db, 2, 2,
- HotplugDisabled,
- PcieGenMaxSupported,
- PcieGenMaxSupported,
- AspmDisabled, 0x04, 0)
- },
- /* Initialize Port descriptor (PCIe port, Lanes 4-7, PCI Device Number 4, ...) */
- {
- DESCRIPTOR_TERMINATE_LIST,
- PCIE_ENGINE_DATA_INITIALIZER(PciePortEngine, 4, 7),
- PCIE_PORT_DATA_INITIALIZER_V2(PortEnabled, ChannelTypeExt6db, 2, 1,
- HotplugDisabled,
- PcieGenMaxSupported,
- PcieGenMaxSupported,
- AspmDisabled, 0x05, 0)
- }
-};
-
-static const PCIe_DDI_DESCRIPTOR DdiList[] = {
- /* DP0 to HDMI0/DP */
- {
- 0,
- PCIE_ENGINE_DATA_INITIALIZER(PcieDdiEngine, 8, 11),
- PCIE_DDI_DATA_INITIALIZER(ConnectorTypeHDMI, Aux1, Hdp1)
- },
- /* DP1 to FCH */
- {
- 0,
- PCIE_ENGINE_DATA_INITIALIZER(PcieDdiEngine, 12, 15),
- PCIE_DDI_DATA_INITIALIZER(ConnectorTypeHDMI, Aux2, Hdp2)
- },
- /* DP2 to HDMI1/DP */
- {
- DESCRIPTOR_TERMINATE_LIST,
- PCIE_ENGINE_DATA_INITIALIZER(PcieDdiEngine, 16, 19),
- PCIE_DDI_DATA_INITIALIZER(ConnectorTypeCrt, Aux3, Hdp3)
- },
-};
-
-static const PCIe_COMPLEX_DESCRIPTOR PcieComplex = {
- .Flags = DESCRIPTOR_TERMINATE_LIST,
- .SocketId = 0,
- .PciePortList = PortList,
- .DdiLinkList = DdiList
-};
-
-void board_BeforeInitReset(struct sysinfo *cb, AMD_RESET_PARAMS *Reset)
-{
- FCH_RESET_INTERFACE *FchReset = &Reset->FchInterface;
-
- FchReset->Xhci0Enable = CONFIG(HUDSON_XHCI_ENABLE);
- FchReset->Xhci1Enable = CONFIG(HUDSON_XHCI_ENABLE);
-
- FchReset->SataEnable = 1;
- FchReset->IdeEnable = 0;
-}
-
-void board_BeforeInitEarly(struct sysinfo *cb, AMD_EARLY_PARAMS *InitEarly)
-{
- InitEarly->GnbConfig.PcieComplexList = &PcieComplex;
-}
-
-/*----------------------------------------------------------------------------------------
- * CUSTOMER OVERRIDES MEMORY TABLE
- *----------------------------------------------------------------------------------------
- */
-
-/*
- * Platform Specific Overriding Table allows IBV/OEM to pass in platform information to AGESA
- * (e.g. MemClk routing, the number of DIMM slots per channel,...). If PlatformSpecificTable
- * is populated, AGESA will base its settings on the data from the table. Otherwise, it will
- * use its default conservative settings.
- */
-static CONST PSO_ENTRY ROMDATA PlatformMemoryTable[] = {
- #define SEED_A 0x12
- HW_RXEN_SEED(
- ANY_SOCKET, CHANNEL_A, ALL_DIMMS,
- SEED_A, SEED_A, SEED_A, SEED_A, SEED_A, SEED_A, SEED_A, SEED_A,
- SEED_A),
-
- NUMBER_OF_DIMMS_SUPPORTED(ANY_SOCKET, ANY_CHANNEL, 2),
- NUMBER_OF_CHANNELS_SUPPORTED(ANY_SOCKET, 1),
- MOTHER_BOARD_LAYERS(LAYERS_4),
-
- MEMCLK_DIS_MAP(ANY_SOCKET, ANY_CHANNEL, 0x01, 0x02, 0x04, 0x08, 0x00, 0x00, 0x00, 0x00),
- CKE_TRI_MAP(ANY_SOCKET, ANY_CHANNEL, 0x01, 0x02, 0x04, 0x08), /* TODO: bit2map, bit3map */
- ODT_TRI_MAP(ANY_SOCKET, ANY_CHANNEL, 0x01, 0x02, 0x04, 0x08),
- CS_TRI_MAP(ANY_SOCKET, ANY_CHANNEL, 0x01, 0x02, 0x04, 0x08, 0x00, 0x00, 0x00, 0x00),
-
- PSO_END
-};
-
-void board_BeforeInitPost(struct sysinfo *cb, AMD_POST_PARAMS *InitPost)
-{
- InitPost->MemConfig.PlatformMemoryConfiguration = (PSO_ENTRY *)PlatformMemoryTable;
-}
-
-void board_BeforeInitMid(struct sysinfo *cb, AMD_MID_PARAMS *InitMid)
-{
- /* 0 iGpuVgaAdapter, 1 iGpuVgaNonAdapter; */
- InitMid->GnbMidConfiguration.iGpuVgaMode = 0;
-}
diff --git a/src/mainboard/biostar/am1ml/OptionsIds.h b/src/mainboard/biostar/am1ml/OptionsIds.h
deleted file mode 100644
index 130d8525ab..0000000000
--- a/src/mainboard/biostar/am1ml/OptionsIds.h
+++ /dev/null
@@ -1,38 +0,0 @@
-/* SPDX-License-Identifier: GPL-2.0-only */
-
-/**
- * @file
- *
- * IDS Option File
- *
- * This file is used to switch on/off IDS features.
- *
- */
-#ifndef _OPTION_IDS_H_
-#define _OPTION_IDS_H_
-
-/**
- *
- * This file generates the defaults tables for the Integrated Debug Support
- * Module. The documented build options are imported from a user controlled
- * file for processing. The build options for the Integrated Debug Support
- * Module are listed below:
- *
- * IDSOPT_IDS_ENABLED
- * IDSOPT_ERROR_TRAP_ENABLED
- * IDSOPT_CONTROL_ENABLED
- * IDSOPT_TRACING_ENABLED
- * IDSOPT_PERF_ANALYSIS
- * IDSOPT_ASSERT_ENABLED
- * IDSOPT_CAR_CORRUPTION_CHECK_ENABLED
- *
- **/
-
-#define IDSOPT_IDS_ENABLED TRUE
-//#define IDSOPT_CONTROL_ENABLED TRUE
-//#define IDSOPT_TRACING_ENABLED TRUE
-#define IDSOPT_TRACING_CONSOLE_SERIALPORT TRUE
-//#define IDSOPT_PERF_ANALYSIS TRUE
-#define IDSOPT_ASSERT_ENABLED TRUE
-
-#endif
diff --git a/src/mainboard/biostar/am1ml/acpi/flag0.asl b/src/mainboard/biostar/am1ml/acpi/flag0.asl
deleted file mode 100644
index 8f0ecaa5c6..0000000000
--- a/src/mainboard/biostar/am1ml/acpi/flag0.asl
+++ /dev/null
@@ -1,9 +0,0 @@
-/* SPDX-License-Identifier: GPL-2.0-only */
-
-OperationRegion (GRAM, SystemMemory, 0x0400, 0x0100)
-
-Field (GRAM, ByteAcc, Lock, Preserve)
-{
- Offset (0x10),
- FLG0, 8
-}
diff --git a/src/mainboard/biostar/am1ml/acpi/gpe.asl b/src/mainboard/biostar/am1ml/acpi/gpe.asl
deleted file mode 100644
index 778c7f73be..0000000000
--- a/src/mainboard/biostar/am1ml/acpi/gpe.asl
+++ /dev/null
@@ -1,61 +0,0 @@
-/* SPDX-License-Identifier: GPL-2.0-only */
-
-Scope(\_GPE) { /* Start Scope GPE */
-
- /* General event 3 */
- Method(_L03) {
- /* DBGO("\\_GPE\\_L00\n") */
- Notify(\_SB.PWRB, 0x02) /* NOTIFY_DEVICE_WAKE */
- }
-
- /* Legacy PM event */
- Method(_L08) {
- /* DBGO("\\_GPE\\_L08\n") */
- }
-
- /* Temp warning (TWarn) event */
- Method(_L09) {
- /* DBGO("\\_GPE\\_L09\n") */
- /* Notify (\_TZ.TZ00, 0x80) */
- }
-
- /* USB controller PME# */
- Method(_L0B) {
- /* DBGO("\\_GPE\\_L0B\n") */
- Notify(\_SB.PCI0.UOH1, 0x02) /* NOTIFY_DEVICE_WAKE */
- Notify(\_SB.PCI0.UOH2, 0x02) /* NOTIFY_DEVICE_WAKE */
- Notify(\_SB.PCI0.UOH3, 0x02) /* NOTIFY_DEVICE_WAKE */
- Notify(\_SB.PCI0.UOH4, 0x02) /* NOTIFY_DEVICE_WAKE */
- Notify(\_SB.PCI0.UOH5, 0x02) /* NOTIFY_DEVICE_WAKE */
- Notify(\_SB.PCI0.UOH6, 0x02) /* NOTIFY_DEVICE_WAKE */
- Notify(\_SB.PCI0.XHC0, 0x02) /* NOTIFY_DEVICE_WAKE */
- Notify(\_SB.PWRB, 0x02) /* NOTIFY_DEVICE_WAKE */
- }
-
- /* ExtEvent0 SCI event */
- Method(_L10) {
- /* DBGO("\\_GPE\\_L10\n") */
- }
-
- /* ExtEvent1 SCI event */
- Method(_L11) {
- /* DBGO("\\_GPE\\_L11\n") */
- }
-
- /* GPIO0 or GEvent8 event */
- Method(_L18) {
- /* DBGO("\\_GPE\\_L18\n") */
- Notify(\_SB.PCI0.PBR4, 0x02) /* NOTIFY_DEVICE_WAKE */
- Notify(\_SB.PCI0.PBR5, 0x02) /* NOTIFY_DEVICE_WAKE */
- Notify(\_SB.PCI0.PBR6, 0x02) /* NOTIFY_DEVICE_WAKE */
- Notify(\_SB.PCI0.PBR7, 0x02) /* NOTIFY_DEVICE_WAKE */
- Notify(\_SB.PWRB, 0x02) /* NOTIFY_DEVICE_WAKE */
- }
-
- /* Azalia SCI event */
- Method(_L1B) {
- /* DBGO("\\_GPE\\_L1B\n") */
- Notify(\_SB.PCI0.AZHD, 0x02) /* NOTIFY_DEVICE_WAKE */
- Notify(\_SB.PWRB, 0x02) /* NOTIFY_DEVICE_WAKE */
- }
-} /* End Scope GPE */
diff --git a/src/mainboard/biostar/am1ml/acpi/ide.asl b/src/mainboard/biostar/am1ml/acpi/ide.asl
deleted file mode 100644
index 766fcb3140..0000000000
--- a/src/mainboard/biostar/am1ml/acpi/ide.asl
+++ /dev/null
@@ -1,227 +0,0 @@
-/* SPDX-License-Identifier: GPL-2.0-only */
-
-/* No IDE functionality */
-
-/*
-Scope (_SB) {
- Device(PCI0) {
- Device(IDEC) {
- Name(_ADR, 0x00140001)
- #include "ide.asl"
- }
- }
-}
-*/
-
-/* Some timing tables */
-Name(UDTT, Package(){ /* Udma timing table */
- 120, 90, 60, 45, 30, 20, 15, 0 /* UDMA modes 0 -> 6 */
-})
-
-Name(MDTT, Package(){ /* MWDma timing table */
- 480, 150, 120, 0 /* Legacy DMA modes 0 -> 2 */
-})
-
-Name(POTT, Package(){ /* Pio timing table */
- 600, 390, 270, 180, 120, 0 /* PIO modes 0 -> 4 */
-})
-
-/* Some timing register value tables */
-Name(MDRT, Package(){ /* MWDma timing register table */
- 0x77, 0x21, 0x20, 0xFF /* Legacy DMA modes 0 -> 2 */
-})
-
-Name(PORT, Package(){
- 0x99, 0x47, 0x34, 0x22, 0x20, 0x99 /* PIO modes 0 -> 4 */
-})
-
-OperationRegion(ICRG, PCI_Config, 0x40, 0x20) /* ide control registers */
- Field(ICRG, AnyAcc, NoLock, Preserve)
-{
- PPTS, 8, /* Primary PIO Slave Timing */
- PPTM, 8, /* Primary PIO Master Timing */
- OFFSET(0x04), PMTS, 8, /* Primary MWDMA Slave Timing */
- PMTM, 8, /* Primary MWDMA Master Timing */
- OFFSET(0x08), PPCR, 8, /* Primary PIO Control */
- OFFSET(0x0A), PPMM, 4, /* Primary PIO master Mode */
- PPSM, 4, /* Primary PIO slave Mode */
- OFFSET(0x14), PDCR, 2, /* Primary UDMA Control */
- OFFSET(0x16), PDMM, 4, /* Primary UltraDMA Mode */
- PDSM, 4, /* Primary UltraDMA Mode */
-}
-
-Method(GTTM, 1) /* get total time*/
-{
- Local0 = Arg0 & 0x0F /* Recovery Width */
- Local0++
- Local1 = Arg0 >> 4 /* Command Width */
- Local1++
- Return(30 * (Local0 + Local1))
-}
-
-Device(PRID)
-{
- Name (_ADR, Zero)
- Method(_GTM, 0)
- {
- NAME(OTBF, Buffer(20) { /* out buffer */
- 0xFF, 0xFF, 0xFF, 0xFF,
- 0xFF, 0xFF, 0xFF, 0xFF,
- 0xFF, 0xFF, 0xFF, 0xFF,
- 0xFF, 0xFF, 0xFF, 0xFF, 0x00, 0x00, 0x00, 0x00
- })
-
- CreateDwordField(OTBF, 0, PSD0) /* PIO spd0 */
- CreateDwordField(OTBF, 4, DSD0) /* DMA spd0 */
- CreateDwordField(OTBF, 8, PSD1) /* PIO spd1 */
- CreateDwordField(OTBF, 12, DSD1) /* DMA spd1 */
- CreateDwordField(OTBF, 16, BFFG) /* buffer flags */
-
- /* Just return if the channel is disabled */
- If (PPCR & 0x01) { /* primary PIO control */
- Return(OTBF)
- }
-
- /* Always tell them independent timing available and IOChannelReady used on both drives */
- BFFG |= 0x1A
-
- /* save total time of primary PIO master timing to PIO spd0 */
- PSD0 = GTTM (PPTM)
- /* save total time of primary PIO slave Timing to PIO spd1 */
- PSD1 = GTTM (PPTS)
-
- If (PDCR & 0x01) { /* It's under UDMA mode */
- BFFG |= 0x01
- DSD0 = DerefOf(UDTT [PDMM])
- }
- Else {
- DSD0 = GTTM (PMTM) /* Primary MWDMA Master Timing, DmaSpd0 */
- }
-
- If (PDCR & 0x02) { /* It's under UDMA mode */
- BFFG |= 0x04
- DSD1 = DerefOf(UDTT [PDSM])
- }
- Else {
- DSD1 = GTTM (PMTS) /* Primary MWDMA Slave Timing, DmaSpd0 */
- }
-
- Return(OTBF) /* out buffer */
- } /* End Method(_GTM) */
-
- Method(_STM, 3, NotSerialized)
- {
- NAME(INBF, Buffer(20) { /* in buffer */
- 0xFF, 0xFF, 0xFF, 0xFF,
- 0xFF, 0xFF, 0xFF, 0xFF,
- 0xFF, 0xFF, 0xFF, 0xFF,
- 0xFF, 0xFF, 0xFF, 0xFF, 0x00, 0x00, 0x00, 0x00
- })
-
- CreateDwordField(INBF, 0, PSD0) /* PIO spd0 */
- CreateDwordField(INBF, 4, DSD0) /* PIO spd0 */
- CreateDwordField(INBF, 8, PSD1) /* PIO spd1 */
- CreateDwordField(INBF, 12, DSD1) /* DMA spd1 */
- CreateDwordField(INBF, 16, BFFG) /*buffer flag */
-
- Local0 = Match (POTT, MLE, PSD0, MTR, 0, 0)
- PPMM = Local0 % 5 /* Primary PIO master Mode */
- Local1 = Match (POTT, MLE, PSD1, MTR, 0, 0)
- PPSM = Local1 % 5 /* Primary PIO slave Mode */
-
- PPTM = DerefOf(PORT [Local0]) /* Primary PIO Master Timing */
- PPTS = DerefOf(PORT [Local1]) /* Primary PIO Slave Timing */
-
- If (BFFG & 0x01) { /* Drive 0 is under UDMA mode */
- Local0 = Match (UDTT, MLE, DSD0, MTR, 0, 0)
- PDMM = Local0 % 7
- PDCR |= 0x01
- }
- Else {
- If (DSD0 != 0xFFFFFFFF) {
- Local0 = Match (MDTT, MLE, DSD0, MTR, 0, 0)
- PMTM = DerefOf(MDRT [Local0])
- }
- }
-
- If (BFFG & 0x04) { /* Drive 1 is under UDMA mode */
- Local0 = Match (UDTT, MLE, DSD1, MTR, 0, 0)
- PDSM = Local0 % 7
- PDCR |= 0x02
- }
- Else {
- If (DSD1 != 0xFFFFFFFF) {
- Local0 = Match (MDTT, MLE, DSD1, MTR, 0, 0)
- PMTS = DerefOf(MDRT [Local0])
- }
- }
- /* Return(INBF) */
- } /*End Method(_STM) */
- Device(MST)
- {
- Name(_ADR, 0)
- Method(_GTF) {
- Name(CMBF, Buffer(21) {
- 0x03, 0x00, 0x00, 0x00, 0x00, 0xFF, 0xEF,
- 0x03, 0x00, 0x00, 0x00, 0x00, 0xFF, 0xEF,
- 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0xF5
- })
- CreateByteField(CMBF, 1, POMD)
- CreateByteField(CMBF, 8, DMMD)
- CreateByteField(CMBF, 5, CMDA)
- CreateByteField(CMBF, 12, CMDB)
- CreateByteField(CMBF, 19, CMDC)
-
- CMDA = 0xA0
- CMDB = 0xA0
- CMDC = 0xA0
-
- POMD = PPMM | 0x08
-
- If (PDCR & 0x01) {
- DMMD = PDMM | 0x40
- }
- Else {
- Local0 = Match (MDTT, MLE, GTTM(PMTM), MTR, 0, 0)
- If (Local0 < 3) {
- DMMD = Local0 | 0x20
- }
- }
- Return(CMBF)
- }
- } /* End Device(MST) */
-
- Device(SLAV)
- {
- Name(_ADR, 1)
- Method(_GTF) {
- Name(CMBF, Buffer(21) {
- 0x03, 0x00, 0x00, 0x00, 0x00, 0xFF, 0xEF,
- 0x03, 0x00, 0x00, 0x00, 0x00, 0xFF, 0xEF,
- 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0xF5
- })
- CreateByteField(CMBF, 1, POMD)
- CreateByteField(CMBF, 8, DMMD)
- CreateByteField(CMBF, 5, CMDA)
- CreateByteField(CMBF, 12, CMDB)
- CreateByteField(CMBF, 19, CMDC)
-
- CMDA = 0xB0
- CMDB = 0xB0
- CMDC = 0xB0
-
- POMD = PPSM | 0x08
-
- If (PDCR & 0x02) {
- DMMD = PDSM | 0x40
- }
- Else {
- Local0 = Match (MDTT, MLE, GTTM(PMTS), MTR, 0, 0)
- If (Local0 < 3) {
- DMMD = Local0 | 0x20
- }
- }
- Return(CMBF)
- }
- } /* End Device(SLAV) */
-}
diff --git a/src/mainboard/biostar/am1ml/acpi/mainboard.asl b/src/mainboard/biostar/am1ml/acpi/mainboard.asl
deleted file mode 100644
index 9b18e722c7..0000000000
--- a/src/mainboard/biostar/am1ml/acpi/mainboard.asl
+++ /dev/null
@@ -1,9 +0,0 @@
-/* SPDX-License-Identifier: GPL-2.0-only */
-
-
-/* AcpiGpe0Blk */
-OperationRegion(GP0B, SystemMemory, 0xfed80814, 0x04)
- Field(GP0B, ByteAcc, NoLock, Preserve) {
- , 11,
- USBS, 1,
-}
diff --git a/src/mainboard/biostar/am1ml/acpi/routing.asl b/src/mainboard/biostar/am1ml/acpi/routing.asl
deleted file mode 100644
index 9bce4b2163..0000000000
--- a/src/mainboard/biostar/am1ml/acpi/routing.asl
+++ /dev/null
@@ -1,169 +0,0 @@
-/* SPDX-License-Identifier: GPL-2.0-only */
-
-/* Routing is in System Bus scope */
-Name(PR0, Package(){
- /* NB devices */
- /* Bus 0, Dev 0 - F16 Host Controller */
-
- /* Bus 0, Dev 1 - PCI Bridge for Internal Graphics(IGP) */
- /* Bus 0, Dev 1, Func 1 - HDMI Audio Controller */
- Package(){0x0001FFFF, 0, INTB, 0 },
- Package(){0x0001FFFF, 1, INTC, 0 },
-
- /* Bus 0, Dev 2 Func 0,1,2,3,4,5 - PCIe Bridges */
- Package(){0x0002FFFF, 0, INTC, 0 },
- Package(){0x0002FFFF, 1, INTD, 0 },
- Package(){0x0002FFFF, 2, INTA, 0 },
- Package(){0x0002FFFF, 3, INTB, 0 },
-
- /* FCH devices */
- /* Bus 0, Dev 20 - F0:SMBus/ACPI,F2:HDAudio;F3:LPC;F7:SD */
- Package(){0x0014FFFF, 0, INTA, 0 },
- Package(){0x0014FFFF, 1, INTB, 0 },
- Package(){0x0014FFFF, 2, INTC, 0 },
- Package(){0x0014FFFF, 3, INTD, 0 },
-
- /* Bus 0, Dev 18, 19, 22 Func 0 - USB: OHCI */
- /* Bus 0, Dev 18, 19, 22 Func 1 - USB: EHCI */
- Package(){0x0012FFFF, 0, INTC, 0 },
- Package(){0x0012FFFF, 1, INTB, 0 },
-
- Package(){0x0013FFFF, 0, INTC, 0 },
- Package(){0x0013FFFF, 1, INTB, 0 },
-
- Package(){0x0016FFFF, 0, INTC, 0 },
- Package(){0x0016FFFF, 1, INTB, 0 },
-
- /* Bus 0, Dev 10 - USB: XHCI func 0, 1 */
- Package(){0x0010FFFF, 0, INTC, 0 },
- Package(){0x0010FFFF, 1, INTB, 0 },
-
- /* Bus 0, Dev 17 - SATA controller */
- Package(){0x0011FFFF, 0, INTD, 0 },
-
-})
-
-Name(APR0, Package(){
- /* NB devices in APIC mode */
- /* Bus 0, Dev 0 - F15 Host Controller */
-
- /* Bus 0, Dev 1 - PCI Bridge for Internal Graphics(IGP) */
- Package(){0x0001FFFF, 0, 0, 44 },
- Package(){0x0001FFFF, 1, 0, 45 },
-
- /* Bus 0, Dev 2 - PCIe Bridges */
- Package(){0x0002FFFF, 0, 0, 24 },
- Package(){0x0002FFFF, 1, 0, 25 },
- Package(){0x0002FFFF, 2, 0, 26 },
- Package(){0x0002FFFF, 3, 0, 27 },
-
- /* SB devices in APIC mode */
- /* Bus 0, Dev 20 - F0:SMBus/ACPI,F2:HDAudio;F3:LPC;F7:SD */
- Package(){0x0014FFFF, 0, 0, 16 },
- Package(){0x0014FFFF, 1, 0, 17 },
- Package(){0x0014FFFF, 2, 0, 18 },
- Package(){0x0014FFFF, 3, 0, 19 },
-
- /* Bus 0, Dev 18, 19, 22 Func 0 - USB: OHCI */
- /* Bus 0, Dev 18, 19, 22 Func 1 - USB: EHCI */
- Package(){0x0012FFFF, 0, 0, 18 },
- Package(){0x0012FFFF, 1, 0, 17 },
-
- Package(){0x0013FFFF, 0, 0, 18 },
- Package(){0x0013FFFF, 1, 0, 17 },
-
- Package(){0x0016FFFF, 0, 0, 18 },
- Package(){0x0016FFFF, 1, 0, 17 },
-
- /* Bus 0, Dev 10 - USB: XHCI func 0, 1 */
- Package(){0x0010FFFF, 0, 0, 0x12},
- Package(){0x0010FFFF, 1, 0, 0x11},
-
- /* Bus 0, Dev 17 - SATA controller */
- Package(){0x0011FFFF, 0, 0, 19 },
-
-})
-
-Name(PS2, Package(){
- Package(){0x0000FFFF, 0, INTC, 0 },
- Package(){0x0000FFFF, 1, INTD, 0 },
- Package(){0x0000FFFF, 2, INTA, 0 },
- Package(){0x0000FFFF, 3, INTB, 0 },
-})
-Name(APS2, Package(){
- Package(){0x0000FFFF, 0, 0, 18 },
- Package(){0x0000FFFF, 1, 0, 19 },
- Package(){0x0000FFFF, 2, 0, 16 },
- Package(){0x0000FFFF, 3, 0, 17 },
-})
-
-/* GFX */
-Name(PS4, Package(){
- Package(){0x0000FFFF, 0, INTA, 0 },
- Package(){0x0000FFFF, 1, INTB, 0 },
- Package(){0x0000FFFF, 2, INTC, 0 },
- Package(){0x0000FFFF, 3, INTD, 0 },
-})
-Name(APS4, Package(){
- /* PCIe slot - Hooked to PCIe slot 4 */
- Package(){0x0000FFFF, 0, 0, 24 },
- Package(){0x0000FFFF, 1, 0, 25 },
- Package(){0x0000FFFF, 2, 0, 26 },
- Package(){0x0000FFFF, 3, 0, 27 },
-})
-
-/* GPP 0 */
-Name(PS5, Package(){
- Package(){0x0000FFFF, 0, INTB, 0 },
- Package(){0x0000FFFF, 1, INTC, 0 },
- Package(){0x0000FFFF, 2, INTD, 0 },
- Package(){0x0000FFFF, 3, INTA, 0 },
-})
-Name(APS5, Package(){
- Package(){0x0000FFFF, 0, 0, 28 },
- Package(){0x0000FFFF, 1, 0, 29 },
- Package(){0x0000FFFF, 2, 0, 30 },
- Package(){0x0000FFFF, 3, 0, 31 },
-})
-
-/* GPP 1 */
-Name(PS6, Package(){
- Package(){0x0000FFFF, 0, INTC, 0 },
- Package(){0x0000FFFF, 1, INTD, 0 },
- Package(){0x0000FFFF, 2, INTA, 0 },
- Package(){0x0000FFFF, 3, INTB, 0 },
-})
-Name(APS6, Package(){
- Package(){0x0000FFFF, 0, 0, 32 },
- Package(){0x0000FFFF, 1, 0, 33 },
- Package(){0x0000FFFF, 2, 0, 34 },
- Package(){0x0000FFFF, 3, 0, 35 },
-})
-
-/* GPP 2 */
-Name(PS7, Package(){
- Package(){0x0000FFFF, 0, INTD, 0 },
- Package(){0x0000FFFF, 1, INTA, 0 },
- Package(){0x0000FFFF, 2, INTB, 0 },
- Package(){0x0000FFFF, 3, INTC, 0 },
-})
-Name(APS7, Package(){
- Package(){0x0000FFFF, 0, 0, 36 },
- Package(){0x0000FFFF, 1, 0, 37 },
- Package(){0x0000FFFF, 2, 0, 38 },
- Package(){0x0000FFFF, 3, 0, 39 },
-})
-
-/* GPP 3 */
-Name(PS8, Package(){
- Package(){0x0000FFFF, 0, INTA, 0 },
- Package(){0x0000FFFF, 1, INTB, 0 },
- Package(){0x0000FFFF, 2, INTC, 0 },
- Package(){0x0000FFFF, 3, INTD, 0 },
-})
-Name(APS8, Package(){
- Package(){0x0000FFFF, 0, 0, 40 },
- Package(){0x0000FFFF, 1, 0, 41 },
- Package(){0x0000FFFF, 2, 0, 42 },
- Package(){0x0000FFFF, 3, 0, 43 },
-})
diff --git a/src/mainboard/biostar/am1ml/acpi/sata.asl b/src/mainboard/biostar/am1ml/acpi/sata.asl
deleted file mode 100644
index 31b93748b8..0000000000
--- a/src/mainboard/biostar/am1ml/acpi/sata.asl
+++ /dev/null
@@ -1,129 +0,0 @@
-/* SPDX-License-Identifier: GPL-2.0-only */
-
-/*
-Scope (_SB) {
- Device(PCI0) {
- Device(SATA) {
- Name(_ADR, 0x00110000)
- #include "sata.asl"
- }
- }
-}
-*/
-
-Name(STTM, Buffer(20) {
- 0x78, 0x00, 0x00, 0x00, 0x0f, 0x00, 0x00, 0x00,
- 0x78, 0x00, 0x00, 0x00, 0x0f, 0x00, 0x00, 0x00,
- 0x1f, 0x00, 0x00, 0x00
-})
-
-/* Start by clearing the PhyRdyChg bits */
-Method(_INI) {
- \_GPE._L1F()
-}
-
-Device(PMRY)
-{
- Name(_ADR, 0)
- Method(_GTM, 0x0, NotSerialized) {
- Return(STTM)
- }
- Method(_STM, 0x3, NotSerialized) {}
-
- Device(PMST) {
- Name(_ADR, 0)
- Method(_STA,0) {
- if (P0IS > 0) {
- return (0x0F) /* sata is visible */
- }
- else {
- return (0x00) /* sata is missing */
- }
- }
- }/* end of PMST */
-
- Device(PSLA)
- {
- Name(_ADR, 1)
- Method(_STA,0) {
- if (P1IS > 0) {
- return (0x0F) /* sata is visible */
- }
- else {
- return (0x00) /* sata is missing */
- }
- }
- } /* end of PSLA */
-} /* end of PMRY */
-
-Device(SEDY)
-{
- Name(_ADR, 1) /* IDE Scondary Channel */
- Method(_GTM, 0x0, NotSerialized) {
- Return(STTM)
- }
- Method(_STM, 0x3, NotSerialized) {}
-
- Device(SMST)
- {
- Name(_ADR, 0)
- Method(_STA,0) {
- if (P2IS > 0) {
- return (0x0F) /* sata is visible */
- }
- else {
- return (0x00) /* sata is missing */
- }
- }
- } /* end of SMST */
-
- Device(SSLA)
- {
- Name(_ADR, 1)
- Method(_STA,0) {
- if (P3IS > 0) {
- return (0x0F) /* sata is visible */
- }
- else {
- return (0x00) /* sata is missing */
- }
- }
- } /* end of SSLA */
-} /* end of SEDY */
-
-/* SATA Hot Plug Support */
-Scope(\_GPE) {
- Method(_L1F,0x0,NotSerialized) {
- if (\_SB.P0PR) {
- if (\_SB.P0IS > 0) {
- sleep(32)
- }
- Notify(\_SB.PCI0.STCR.PMRY.PMST, 0x01) /* NOTIFY_DEVICE_CHECK */
- \_SB.P0PR = 1
- }
-
- if (\_SB.P1PR) {
- if (\_SB.P1IS > 0) {
- sleep(32)
- }
- Notify(\_SB.PCI0.STCR.PMRY.PSLA, 0x01) /* NOTIFY_DEVICE_CHECK */
- \_SB.P1PR = 1
- }
-
- if (\_SB.P2PR) {
- if (\_SB.P2IS > 0) {
- sleep(32)
- }
- Notify(\_SB.PCI0.STCR.SEDY.SMST, 0x01) /* NOTIFY_DEVICE_CHECK */
- \_SB.P2PR = 1
- }
-
- if (\_SB.P3PR) {
- if (\_SB.P3IS > 0) {
- sleep(32)
- }
- Notify(\_SB.PCI0.STCR.SEDY.SSLA, 0x01) /* NOTIFY_DEVICE_CHECK */
- \_SB.P3PR = 1
- }
- }
-}
diff --git a/src/mainboard/biostar/am1ml/acpi/sio.asl b/src/mainboard/biostar/am1ml/acpi/sio.asl
deleted file mode 100644
index bf4ff3daed..0000000000
--- a/src/mainboard/biostar/am1ml/acpi/sio.asl
+++ /dev/null
@@ -1,65 +0,0 @@
-/* SPDX-License-Identifier: GPL-2.0-only */
-
-OperationRegion (IOID, SystemIO, 0x2E, 0x02)
-Field (IOID, ByteAcc, NoLock, Preserve)
-{
- SIOI, 8, SIOD, 8 /* 0x2E and 0x2F */
-}
-
-IndexField (SIOI, SIOD, ByteAcc, NoLock, Preserve)
-{
- Offset (0x07),
- LDN, 8, /* Logical Device Number */
- Offset (0x20),
- CID1, 8, /* Chip ID Byte 1, 0x87 */
- CID2, 8, /* Chip ID Byte 2, 0x12 */
- Offset (0x30),
- ACTR, 8, /* Function activate */
- Offset (0xF0),
- APC0, 8, /* APC/PME Event Enable Register */
- APC1, 8, /* APC/PME Status Register */
- APC2, 8, /* APC/PME Control Register 1 */
- APC3, 8, /* Environment Controller Special Configuration Register */
- APC4, 8 /* APC/PME Control Register 2 */
-}
-
-/* Enter the 8728 Config */
-Method (EPNP)
-{
- SIOI = 0x87
- SIOI = 0x01
- SIOI = 0x55
- SIOI = 0x55
-}
-
-/* Exit the 8728 Config */
-Method (XPNP)
-{
- SIOI = 0x02
- SIOD = 0x02
-}
-
-/*
- * Keyboard PME is routed to SB700 Gevent3. We can wake
- * up the system by pressing the key.
- */
-Method (SIOS, 1)
-{
- /* We only enable KBD PME for S5. */
- If (Arg0 < 0x05)
- {
- EPNP()
- /* DBGO("8728F\n") */
- LDN = 0x4
- ACTR = 1 /* Enable EC */
- /*
- LDN = 0x4
- APC4 = 0x04
- */ /* falling edge. which mode? Not sure. */
- LDN = 0x4
- APC1 = 0x08 /* clear PME status, Use 0x18 for mouse & KBD */
- LDN = 0x4
- APC0 = 0x08 /* enable PME, Use 0x18 for mouse & KBD */
- XPNP()
- }
-}
diff --git a/src/mainboard/biostar/am1ml/acpi/sleep.asl b/src/mainboard/biostar/am1ml/acpi/sleep.asl
deleted file mode 100644
index fc26c306d9..0000000000
--- a/src/mainboard/biostar/am1ml/acpi/sleep.asl
+++ /dev/null
@@ -1,64 +0,0 @@
-/* SPDX-License-Identifier: GPL-2.0-only */
-
-/* Wake status package */
-Name(WKST,Package(){Zero, Zero})
-
-/*
-* \_PTS - Prepare to Sleep method
-*
-* Entry:
-* Arg0=The value of the sleeping state S1=1, S2=2, etc
-*
-* Exit:
-* -none-
-*
-* The _PTS control method is executed at the beginning of the sleep process
-* for S1-S5. The sleeping value is passed to the _PTS control method. This
-* control method may be executed a relatively long time before entering the
-* sleep state and the OS may abort the operation without notification to
-* the ACPI driver. This method cannot modify the configuration or power
-* state of any device in the system.
-*/
-
-External(\_SB.APTS, MethodObj)
-External(\_SB.AWAK, MethodObj)
-
-Method(_PTS, 1) {
- /* DBGO("\\_PTS\n") */
- /* DBGO("From S0 to S") */
- /* DBGO(Arg0) */
- /* DBGO("\n") */
-
- /* Clear wake status structure. */
- WKST [0] = 0
- WKST [1] = 0
- UPWS = 7
- \_SB.APTS(Arg0)
-} /* End Method(\_PTS) */
-
-/*
-* \_WAK System Wake method
-*
-* Entry:
-* Arg0=The value of the sleeping state S1=1, S2=2
-*
-* Exit:
-* Return package of 2 DWords
-* Dword 1 - Status
-* 0x00000000 wake succeeded
-* 0x00000001 Wake was signaled but failed due to lack of power
-* 0x00000002 Wake was signaled but failed due to thermal condition
-* Dword 2 - Power Supply state
-* if non-zero the effective S-state the power supply entered
-*/
-Method(\_WAK, 1) {
- /* DBGO("\\_WAK\n") */
- /* DBGO("From S") */
- /* DBGO(Arg0) */
- /* DBGO(" to S0\n") */
- USBS = 1
-
- \_SB.AWAK(Arg0)
-
- Return(WKST)
-} /* End Method(\_WAK) */
diff --git a/src/mainboard/biostar/am1ml/acpi/superio.asl b/src/mainboard/biostar/am1ml/acpi/superio.asl
deleted file mode 100644
index 03683b3691..0000000000
--- a/src/mainboard/biostar/am1ml/acpi/superio.asl
+++ /dev/null
@@ -1,85 +0,0 @@
-/* SPDX-License-Identifier: GPL-2.0-only */
-
-// Scope is \_SB.PCI0.LPCB
-
-// Values, defined here, must match settings in devicetree.cb
-
-Device (PS2M) {
- Name (_HID, EisaId ("PNP0F13"))
- Name (_CRS, ResourceTemplate () {
- IO (Decode16, 0x0060, 0x0060, 0x00, 0x01)
- IO (Decode16, 0x0064, 0x0064, 0x00, 0x01)
- IRQNoFlags () {12}
- })
- Method (_STA, 0, NotSerialized) {
- Local0 = FLG0 & 0x04
- If (Local0 == 0x04) {
- Return (0x0F)
- } Else {
- Return (0x00)
- }
- }
-}
-
-Device (PS2K) {
- Name (_HID, EisaId ("PNP0303"))
- Method (_STA, 0, NotSerialized) {
- Local0 = FLG0 & 0x04
- If (Local0 == 0x04) {
- Return (0x0F)
- } Else {
- Return (0x00)
- }
- }
- Name (_CRS, ResourceTemplate () {
- IO (Decode16, 0x0060, 0x0060, 0x00, 0x01)
- IO (Decode16, 0x0064, 0x0064, 0x00, 0x01)
- IRQNoFlags () {1}
- })
-}
-
-Device (COM1) {
- Name (_HID, EISAID ("PNP0501"))
- Name (_UID, 1)
- Method (_STA, 0, NotSerialized) {
- Local0 = FLG0 & 0x04
- If (Local0 == 0x04) {
- Return (0x0F)
- } Else {
- Return (0x00)
- }
- }
- Name (_CRS, ResourceTemplate ()
- {
- IO (Decode16, 0x03F8, 0x03F8, 0x08, 0x08)
- IRQNoFlags () {4}
- })
- Name (_PRS, ResourceTemplate ()
- {
- IO (Decode16, 0x03F8, 0x03F8, 0x08, 0x08)
- IRQNoFlags () {4}
- })
-}
-
-Device (LPT1) {
- Name (_HID, EISAID ("PNP0400"))
- Name (_UID, 1)
- Method (_STA, 0, NotSerialized) {
- Local0 = FLG0 & 0x04
- If (Local0 == 0x04) {
- Return (0x0F)
- } Else {
- Return (0x00)
- }
- }
- Name (_CRS, ResourceTemplate ()
- {
- IO (Decode16, 0x0378, 0x0378, 0x04, 0x08)
- IRQNoFlags () {5}
- })
- Name (_PRS, ResourceTemplate ()
- {
- IO (Decode16, 0x0378, 0x0378, 0x04, 0x08)
- IRQNoFlags () {5}
- })
-}
diff --git a/src/mainboard/biostar/am1ml/acpi/thermal.asl b/src/mainboard/biostar/am1ml/acpi/thermal.asl
deleted file mode 100644
index 16990d45f4..0000000000
--- a/src/mainboard/biostar/am1ml/acpi/thermal.asl
+++ /dev/null
@@ -1,3 +0,0 @@
-/* SPDX-License-Identifier: CC-PDDC */
-
-/* Please update the license if adding licensable material. */
diff --git a/src/mainboard/biostar/am1ml/acpi/usb_oc.asl b/src/mainboard/biostar/am1ml/acpi/usb_oc.asl
deleted file mode 100644
index a5846fe848..0000000000
--- a/src/mainboard/biostar/am1ml/acpi/usb_oc.asl
+++ /dev/null
@@ -1,13 +0,0 @@
-/* SPDX-License-Identifier: GPL-2.0-only */
-
-/* USB overcurrent mapping pins. */
-Name(UOM0, 0)
-Name(UOM1, 2)
-Name(UOM2, 0)
-Name(UOM3, 7)
-Name(UOM4, 2)
-Name(UOM5, 2)
-Name(UOM6, 6)
-Name(UOM7, 2)
-Name(UOM8, 6)
-Name(UOM9, 6)
diff --git a/src/mainboard/biostar/am1ml/board_info.txt b/src/mainboard/biostar/am1ml/board_info.txt
deleted file mode 100644
index af6dfc7f7d..0000000000
--- a/src/mainboard/biostar/am1ml/board_info.txt
+++ /dev/null
@@ -1,5 +0,0 @@
-Category: mini
-Board URL: http://www.biostar.com.tw/app/en/mb/introduction.php?S_ID=694
-ROM package: DIP8
-ROM protocol: SPI
-ROM socketed: y
diff --git a/src/mainboard/biostar/am1ml/bootblock.c b/src/mainboard/biostar/am1ml/bootblock.c
deleted file mode 100644
index 405271b064..0000000000
--- a/src/mainboard/biostar/am1ml/bootblock.c
+++ /dev/null
@@ -1,70 +0,0 @@
-/* SPDX-License-Identifier: GPL-2.0-only */
-
-#include <amdblocks/acpimmio.h>
-#include <bootblock_common.h>
-#include <device/pnp_def.h>
-#include <device/pnp_ops.h>
-#include <superio/ite/common/ite.h>
-#include <superio/ite/it8728f/it8728f.h>
-
-#define SERIAL_DEV PNP_DEV(0x2e, IT8728F_SP1)
-#define GPIO_DEV PNP_DEV(0x2e, IT8728F_GPIO)
-#define ENVC_DEV PNP_DEV(0x2e, IT8728F_EC)
-
-static void ite_evc_conf(pnp_devfn_t dev)
-{
- pnp_enter_conf_state(dev);
- pnp_set_logical_device(dev);
- pnp_write_config(dev, PNP_IDX_MSC1, 0x40);
- pnp_write_config(dev, PNP_IDX_MSC4, 0x80);
- pnp_write_config(dev, PNP_IDX_MSC5, 0x00);
- pnp_write_config(dev, PNP_IDX_MSC6, 0xf0);
- pnp_write_config(dev, PNP_IDX_MSC9, 0x48);
- pnp_write_config(dev, PNP_IDX_MSCA, 0x00);
- pnp_write_config(dev, PNP_IDX_MSCB, 0x00);
- pnp_exit_conf_state(dev);
-}
-
-static void ite_gpio_conf(pnp_devfn_t dev)
-{
- pnp_enter_conf_state(dev);
- pnp_set_logical_device(dev);
- pnp_write_config(dev, 0x25, 0x80);
- pnp_write_config(dev, 0x26, 0x07);
- pnp_write_config(dev, 0x28, 0x81);
- pnp_write_config(dev, 0x2c, 0x06);
- pnp_write_config(dev, PNP_IDX_IRQ1, 0x00);
- pnp_write_config(dev, 0x73, 0x00);
- pnp_write_config(dev, 0xb3, 0x01);
- pnp_write_config(dev, 0xb8, 0x00);
- pnp_write_config(dev, 0xc0, 0x00);
- pnp_write_config(dev, 0xc3, 0x00);
- pnp_write_config(dev, 0xc8, 0x00);
- pnp_write_config(dev, 0xc9, 0x07);
- pnp_write_config(dev, 0xcb, 0x01);
- pnp_write_config(dev, PNP_IDX_MSC0, 0x10);
- pnp_write_config(dev, PNP_IDX_MSC4, 0x27);
- pnp_write_config(dev, PNP_IDX_MSC8, 0x20);
- pnp_write_config(dev, PNP_IDX_MSC9, 0x01);
- pnp_exit_conf_state(dev);
-}
-
-void bootblock_mainboard_early_init(void)
-{
- /* Disable PCI-PCI bridge and release GPIO32/33 for other uses. */
- pm_write8(0xea, 0x1);
-
- /* Set auxiliary output clock frequency on OSCOUT1 pin to be 48MHz */
- misc_write32(0x28, misc_read32(0x28) & 0xfff8ffff);
-
- /* Enable Auxiliary Clock1, disable FCH 14 MHz OscClk */
- misc_write32(0x40, misc_read32(0x40) & 0xffffbffb);
-
- /* Configure SIO as made under vendor BIOS */
- ite_evc_conf(ENVC_DEV);
- ite_gpio_conf(GPIO_DEV);
-
- /* Enable serial output on it8728f */
- ite_kill_watchdog(GPIO_DEV);
- ite_enable_serial(SERIAL_DEV, CONFIG_TTYS0_BASE);
-}
diff --git a/src/mainboard/biostar/am1ml/buildOpts.c b/src/mainboard/biostar/am1ml/buildOpts.c
deleted file mode 100644
index 808bacec7c..0000000000
--- a/src/mainboard/biostar/am1ml/buildOpts.c
+++ /dev/null
@@ -1,49 +0,0 @@
-/* SPDX-License-Identifier: GPL-2.0-only */
-
-#include <AGESA.h>
-
-#define INSTALL_FT3_SOCKET_SUPPORT TRUE
-#define INSTALL_FAMILY_16_MODEL_0x_SUPPORT TRUE
-
-//#define BLDOPT_REMOVE_UDIMMS_SUPPORT TRUE
-//#define BLDOPT_REMOVE_RDIMMS_SUPPORT TRUE
-//#define BLDOPT_REMOVE_LRDIMMS_SUPPORT TRUE
-#define BLDOPT_REMOVE_ECC_SUPPORT TRUE
-//#define BLDOPT_REMOVE_SRAT FALSE
-#define BLDOPT_REMOVE_WHEA FALSE
-#define BLDOPT_REMOVE_CRAT TRUE
-#define BLDOPT_REMOVE_CDIT TRUE
-
-/* Build configuration values here. */
-#define BLDCFG_VRM_NB_LOW_POWER_THRESHOLD 0
-
-#define BLDCFG_AMD_PLATFORM_TYPE AMD_PLATFORM_MOBILE
-
-#define BLDCFG_MEMORY_BUS_FREQUENCY_LIMIT DDR1600_FREQUENCY
-#define BLDCFG_MEMORY_RDIMM_CAPABLE TRUE
-#define BLDCFG_MEMORY_UDIMM_CAPABLE TRUE
-#define BLDCFG_MEMORY_SODIMM_CAPABLE FALSE
-#define BLDCFG_MEMORY_ENABLE_BANK_INTERLEAVING FALSE
-#define BLDCFG_MEMORY_CHANNEL_INTERLEAVING FALSE
-#define BLDCFG_MEMORY_CLOCK_SELECT DDR1333_FREQUENCY /* FIXME: Turtle RAM? */
-#define BLDCFG_IGNORE_SPD_CHECKSUM TRUE
-#define BLDCFG_ENABLE_ECC_FEATURE FALSE
-#define BLDCFG_ECC_SYNC_FLOOD FALSE
-#define BLDCFG_IOMMU_SUPPORT FALSE
-
-#define BLDCFG_CFG_GNB_HD_AUDIO TRUE
-
-/* Include the files that instantiate the configuration definitions. */
-#include "cpuRegisters.h"
-#include "cpuFamRegisters.h"
-#include "cpuFamilyTranslation.h"
-#include "AdvancedApi.h"
-#include "heapManager.h"
-#include "CreateStruct.h"
-#include "cpuFeatures.h"
-#include "Table.h"
-#include "cpuEarlyInit.h"
-#include "cpuLateInit.h"
-#include "GnbInterface.h"
-
-#include <PlatformInstall.h>
diff --git a/src/mainboard/biostar/am1ml/cmos.layout b/src/mainboard/biostar/am1ml/cmos.layout
deleted file mode 100644
index c67becb88a..0000000000
--- a/src/mainboard/biostar/am1ml/cmos.layout
+++ /dev/null
@@ -1,70 +0,0 @@
-#*****************************************************************************
-# SPDX-License-Identifier: GPL-2.0-only
-
-#*****************************************************************************
-
-entries
-
-#start-bit length config config-ID name
-#0 8 r 0 seconds
-#8 8 r 0 alarm_seconds
-#16 8 r 0 minutes
-#24 8 r 0 alarm_minutes
-#32 8 r 0 hours
-#40 8 r 0 alarm_hours
-#48 8 r 0 day_of_week
-#56 8 r 0 day_of_month
-#64 8 r 0 month
-#72 8 r 0 year
-#80 4 r 0 rate_select
-#84 3 r 0 REF_Clock
-#87 1 r 0 UIP
-#88 1 r 0 auto_switch_DST
-#89 1 r 0 24_hour_mode
-#90 1 r 0 binary_values_enable
-#91 1 r 0 square-wave_out_enable
-#92 1 r 0 update_finished_enable
-#93 1 r 0 alarm_interrupt_enable
-#94 1 r 0 periodic_interrupt_enable
-#95 1 r 0 disable_clock_updates
-#96 288 r 0 temporary_filler
-0 384 r 0 reserved_memory
-384 1 e 4 boot_option
-388 4 h 0 reboot_counter
-400 1 e 1 power_on_after_fail
-412 4 e 6 debug_level
-416 4 e 7 boot_first
-420 4 e 7 boot_second
-424 4 e 7 boot_third
-428 4 h 0 boot_index
-432 8 h 0 boot_countdown
-444 1 e 1 nmi
-728 256 h 0 user_data
-984 16 h 0 check_sum
-# Reserve the extended AMD configuration registers
-1000 24 r 0 amd_reserved
-
-enumerations
-
-#ID value text
-1 0 Disable
-1 1 Enable
-2 0 Enable
-2 1 Disable
-4 0 Fallback
-4 1 Normal
-6 5 Notice
-6 6 Info
-6 7 Debug
-6 8 Spew
-7 0 Network
-7 1 HDD
-7 2 Floppy
-7 8 Fallback_Network
-7 9 Fallback_HDD
-7 10 Fallback_Floppy
-#7 3 ROM
-
-checksums
-
-checksum 392 983 984
diff --git a/src/mainboard/biostar/am1ml/devicetree.cb b/src/mainboard/biostar/am1ml/devicetree.cb
deleted file mode 100644
index c8d8d8f702..0000000000
--- a/src/mainboard/biostar/am1ml/devicetree.cb
+++ /dev/null
@@ -1,94 +0,0 @@
-# SPDX-License-Identifier: GPL-2.0-only
-
-chip northbridge/amd/agesa/family16kb/root_complex
- device cpu_cluster 0 on
- chip cpu/amd/agesa/family16kb
- device lapic 0 on end
- end
- end
-
- device domain 0 on
- subsystemid 0x1002 0x439d inherit
- chip northbridge/amd/agesa/family16kb
- device pci 0.0 on end # Root Complex
- device pci 1.0 on end # Internal Graphics P2P bridge 0x9804
- device pci 1.1 on end # Internal Multimedia
- device pci 2.0 on end
- device pci 2.1 on end
- device pci 2.2 on end
- device pci 2.3 on end
- device pci 2.4 on end
- device pci 2.5 on end
- end #chip northbridge/amd/agesa/family16kb
-
- chip southbridge/amd/agesa/hudson # it is under NB/SB Link, but on the same pci bus
- device pci 10.0 on end # XHCI HC0
- device pci 11.0 on end # SATA
- device pci 12.0 on end # USB
- device pci 12.2 on end # USB
- device pci 13.0 on end # USB
- device pci 13.2 on end # USB
- device pci 14.0 on end # SM
- device pci 14.1 on end # there is no legacy ide
- device pci 14.2 on end # HDA 0x4383
- device pci 14.3 on # LPC 0x439d
- chip superio/ite/it8728f
- device pnp 2e.0 off # Floppy
- io 0x60 = 0x3f0
- irq 0x70 = 6
- drq 0x74 = 2
- end
- device pnp 2e.1 on # Com1
- io 0x60 = 0x3f8
- irq 0x70 = 4
- end
- device pnp 2e.2 off # Com2
- io 0x60 = 0x2f8
- irq 0x70 = 3
- end
- device pnp 2e.3 on # Parallel Port
- io 0x60 = 0x378
- io 0x62 = 0
- drq 0x74 = 4
- irq 0x70 = 5
- end
- device pnp 2e.4 on # Env Controller
- io 0x60 = 0xa00
- io 0x62 = 0xa20
- irq 0x70 = 0
- end
- device pnp 2e.5 on # Keyboard
- io 0x60 = 0x60
- io 0x62 = 0x64
- irq 0x70 = 1
- end
- device pnp 2e.6 on # Mouse
- irq 0x70 = 12
- end
- device pnp 2e.7 on # GPIO
- io 0x60 = 0xa40
- io 0x62 = 0xa40
- io 0x64 = 0
- irq 0x70 = 0
- end
- device pnp 2e.a off end # CIR
- end #superio/ite/it8728f
- end #device pci 14.3 # LPC
- device pci 14.7 off end # SD
- end #chip southbridge/amd/agesa/hudson
-
- chip northbridge/amd/agesa/family16kb
- device pci 18.0 on end
- device pci 18.1 on end
- device pci 18.2 on end
- device pci 18.3 on end
- device pci 18.4 on end
- device pci 18.5 on end
- register "spdAddrLookup" = "
- {
- { {0xA0, 0xA2} },
- }"
- end
-
- end #domain
-end #northbridge/amd/agesa/family16kb/root_complex
diff --git a/src/mainboard/biostar/am1ml/dsdt.asl b/src/mainboard/biostar/am1ml/dsdt.asl
deleted file mode 100644
index 0b57286103..0000000000
--- a/src/mainboard/biostar/am1ml/dsdt.asl
+++ /dev/null
@@ -1,78 +0,0 @@
-/* SPDX-License-Identifier: GPL-2.0-only */
-
-/* DefinitionBlock Statement */
-#include <acpi/acpi.h>
-DefinitionBlock (
- "dsdt.aml",
- "DSDT",
- ACPI_DSDT_REV_2,
- OEM_ID,
- ACPI_TABLE_CREATOR,
- 0x00010001 /* OEM Revision */
- )
-{ /* Start of ASL file */
- #include <acpi/dsdt_top.asl>
-
- /* Globals for the platform */
- #include "acpi/mainboard.asl"
-
- /* Describe the USB Overcurrent pins */
- #include "acpi/usb_oc.asl"
-
- /* PCI IRQ mapping for the Southbridge */
- #include <southbridge/amd/agesa/hudson/acpi/pcie.asl>
-
- /* Describe the processor tree (\_SB) */
- #include <cpu/amd/agesa/family16kb/acpi/cpu.asl>
-
- /* Contains the supported sleep states for this chipset */
- #include <southbridge/amd/common/acpi/sleepstates.asl>
-
- /* Contains the Sleep methods (WAK, PTS, GTS, etc.) */
- #include "acpi/sleep.asl"
-
- /* stuff for sio */
- #include "acpi/flag0.asl"
-
- /* System Bus */
- Scope(\_SB) { /* Start \_SB scope */
- /* global utility methods expected within the \_SB scope */
- #include <arch/x86/acpi/globutil.asl>
-
- /* Describe IRQ Routing mapping for this platform (within the \_SB scope) */
- #include "acpi/routing.asl"
-
- Device(PWRB) {
- Name(_HID, EISAID("PNP0C0C"))
- Name(_UID, 0xAA)
- Name(_PRW, Package () {3, 0x04})
- Name(_STA, 0x0B)
- }
-
- Device(PCI0) {
- /* Describe the AMD Northbridge */
- #include <northbridge/amd/agesa/family16kb/acpi/northbridge.asl>
-
- /* Describe the AMD Fusion Controller Hub Southbridge */
- #include <southbridge/amd/agesa/hudson/acpi/fch.asl>
-
- /* sio fixup */
- #include "acpi/sio.asl"
- }
-
- /* Describe PCI INT[A-H] for the Southbridge */
- #include <southbridge/amd/agesa/hudson/acpi/pci_int.asl>
-
- } /* End \_SB scope */
-
- /* Describe SMBUS for the Southbridge */
- #include <southbridge/amd/agesa/hudson/acpi/smbus.asl>
-
- /* Define the General Purpose Events for the platform */
- #include "acpi/gpe.asl"
-
- /* Define the Thermal zones and methods for the platform */
- #include "acpi/thermal.asl"
-
-}
-/* End of ASL file */
diff --git a/src/mainboard/biostar/am1ml/irq_tables.c b/src/mainboard/biostar/am1ml/irq_tables.c
deleted file mode 100644
index 9d0bd604fc..0000000000
--- a/src/mainboard/biostar/am1ml/irq_tables.c
+++ /dev/null
@@ -1,40 +0,0 @@
-/* SPDX-License-Identifier: GPL-2.0-or-later */
-
-#include <arch/pirq_routing.h>
-
-const struct irq_routing_table intel_irq_routing_table = {
- PIRQ_SIGNATURE, /* u32 signature */
- PIRQ_VERSION, /* u16 version */
- 32 + 16 * 10, /* Max. number of devices on the bus */
- 0x00, /* Interrupt router bus */
- (0x14 << 3) | 0x3, /* Interrupt router dev */
- 0, /* IRQs devoted exclusively to PCI usage */
- 0x1002, /* Vendor */
- 0x439d, /* Device */
- 0, /* Miniport */
- { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, /* u8 rfu[11] */
- 0xa6, /* Checksum (has to be set to some value that
- * would give 0 after the sum of all bytes
- * for this structure (including checksum).
- */
- /* clang-format off */
- {
- /* bus, dev | fn, {link, bitmap}, {link, bitmap}, {link, bitmap}, {link, bitmap}, slot, rfu */
- {0x00, (0x00 << 3) | 0x0, {{0x01, 0xccb0}, {0x02, 0xccb0}, {0x03, 0xccb0}, {0x04, 0xdab8}}, 0x0, 0x0},
- {0x00, (0x01 << 3) | 0x0, {{0x05, 0xccb0}, {0x06, 0xccb0}, {0x07, 0xccb0}, {0x08, 0xccb0}}, 0x0, 0x0},
- {0x00, (0x02 << 3) | 0x0, {{0x05, 0xccb0}, {0x06, 0xccb0}, {0x07, 0xccb0}, {0x08, 0xccb0}}, 0x0, 0x0},
- {0x00, (0x14 << 3) | 0x0, {{0x01, 0xccb0}, {0x02, 0xccb0}, {0x03, 0xccb0}, {0x04, 0xdab8}}, 0x0, 0x0},
- {0x00, (0x12 << 3) | 0x0, {{0x03, 0xccb0}, {0x02, 0xccb0}, {0x00, 0x0000}, {0x00, 0x0000}}, 0x0, 0x0},
- {0x00, (0x13 << 3) | 0x0, {{0x03, 0xccb0}, {0x02, 0xccb0}, {0x00, 0x0000}, {0x00, 0x0000}}, 0x0, 0x0},
- {0x00, (0x16 << 3) | 0x0, {{0x03, 0xccb0}, {0x02, 0xccb0}, {0x00, 0x0000}, {0x00, 0x0000}}, 0x0, 0x0},
- {0x00, (0x10 << 3) | 0x0, {{0x03, 0xccb0}, {0x00, 0x0000}, {0x00, 0x0000}, {0x00, 0x0000}}, 0x0, 0x0},
- {0x00, (0x11 << 3) | 0x0, {{0x04, 0xdab8}, {0x00, 0x0000}, {0x00, 0x0000}, {0x00, 0x0000}}, 0x0, 0x0},
- {0x01, (0x00 << 3) | 0x0, {{0x05, 0xccb0}, {0x06, 0xccb0}, {0x07, 0xccb0}, {0x08, 0xccb0}}, 0x12, 0x0},
- }
- /* clang-format on */
-};
-
-unsigned long write_pirq_routing_table(unsigned long addr)
-{
- return copy_pirq_routing_table(addr, &intel_irq_routing_table);
-}
diff --git a/src/mainboard/biostar/am1ml/mainboard.c b/src/mainboard/biostar/am1ml/mainboard.c
deleted file mode 100644
index d300a45ce4..0000000000
--- a/src/mainboard/biostar/am1ml/mainboard.c
+++ /dev/null
@@ -1,90 +0,0 @@
-/* SPDX-License-Identifier: GPL-2.0-only */
-
-#include <device/device.h>
-#include <southbridge/amd/agesa/hudson/pci_devs.h>
-#include <southbridge/amd/agesa/hudson/amd_pci_int_defs.h>
-#include <southbridge/amd/common/amd_pci_util.h>
-#include <northbridge/amd/agesa/family16kb/pci_devs.h>
-
-static const u8 mainboard_picr_data[FCH_INT_TABLE_SIZE] = {
- /* INTA# - INTH# */
- [0x00] = 0x03,0x04,0x05,0x07,0x0B,0x0A,0x1F,0x1F,
- /* Misc-nil,0,1,2, INT from Serial irq */
- [0x08] = 0x5A,0xF1,0x00,0x00,0x1F,0x1F,0x1F,0x1F,
- /* SCI, SMBUS0, ASF, HDA, FC, RSVD, PerMon, SD */
- [0x10] = 0x1F,0x1F,0x1F,0x03,0x1F,0x1F,0x1F,0x1F, // HDA was 1F - now 03
- /* IMC INT0 - 5 */
- [0x20] = 0x1F,0x1F,0x1F,0x1F,0x1F,0x1F,
- /* USB Devs 18/19/22 INTA-C */
- [0x30] = 0x05,0x04,0x05,0x04,0x04,0x05,0x04,0x05,
- /* SATA & MISSING IDE */
- [0x40] = 0x04, 0x04
-};
-
-static const u8 mainboard_intr_data[FCH_INT_TABLE_SIZE] = {
- /* INTA# - INTH# */
- [0x00] = 0x10,0x11,0x12,0x13,0x14,0x15,0x16,0x17,
- /* Misc-nil,0,1,2, INT from Serial irq */
- [0x08] = 0x00,0x00,0x00,0x00,0x1F,0x1F,0x1F,0x1F,
- /* SCI, SMBUS0, ASF, HDA, FC, GEC, PerMon, SD */
- [0x10] = 0x09,0x1F,0x1F,0x10,0x1F,0x10,0x1F,0x10,0x1F,0x1F,
- /* IMC INT0 - 5 */
- [0x20] = 0x05,0x1F,0x1F,0x1F,0x1F,0x1F,
- /* USB Devs 18/19/20/22 INTA-C */
- [0x30] = 0x12,0x11,0x12,0x11,0x12,0x11,0x12,
- /* SATA & MISSING IDE*/
- [0x40] = 0x11, 0x11
-};
-
-/*
- * This table defines the index into the picr/intr_data
- * tables for each device. Any enabled device and slot
- * that uses hardware interrupts should have an entry
- * in this table to define its index into the FCH
- * PCI_INTR register 0xC00/0xC01. This index will define
- * the interrupt that it should use. Putting PIRQ_A into
- * the PIN A index for a device will tell that device to
- * use PIC IRQ 10 if it uses PIN A for its hardware INT.
- */
-static const struct pirq_struct mainboard_pirq_data[] = {
- /* {PCI_devfn, {PIN A, PIN B, PIN C, PIN D}}, */
- {GFX_DEVFN, {PIRQ_A, PIRQ_NC, PIRQ_NC, PIRQ_NC}}, /* VGA: 01.0 */
- {ACTL_DEVFN,{PIRQ_NC, PIRQ_B, PIRQ_NC, PIRQ_NC}}, /* Audio: 01.1 */
- {NB_PCIE_PORT1_DEVFN, {PIRQ_A, PIRQ_B, PIRQ_C, PIRQ_D}}, /* x4 PCIe: 02.1 */
- {NB_PCIE_PORT2_DEVFN, {PIRQ_B, PIRQ_C, PIRQ_D, PIRQ_A}}, /* mPCIe: 02.2 */
- {NB_PCIE_PORT3_DEVFN, {PIRQ_C, PIRQ_D, PIRQ_A, PIRQ_B}}, /* NIC: 02.3 */
- {NB_PCIE_PORT4_DEVFN, {PIRQ_D, PIRQ_A, PIRQ_B, PIRQ_C}}, /* Edge: 02.4 */
- {NB_PCIE_PORT5_DEVFN, {PIRQ_E, PIRQ_F, PIRQ_G, PIRQ_H}}, /* Edge: 02.5 */
- {XHCI_DEVFN, {PIRQ_C, PIRQ_NC, PIRQ_NC, PIRQ_NC}}, /* XHCI: 10.0 */
- {SATA_DEVFN, {PIRQ_SATA, PIRQ_NC, PIRQ_NC, PIRQ_NC}}, /* SATA: 11.0 */
- {OHCI1_DEVFN, {PIRQ_OHCI1, PIRQ_NC, PIRQ_NC, PIRQ_NC}}, /* OHCI1: 12.0 */
- {EHCI1_DEVFN, {PIRQ_NC, PIRQ_EHCI1, PIRQ_NC, PIRQ_NC}}, /* EHCI1: 12.2 */
- {OHCI2_DEVFN, {PIRQ_OHCI2, PIRQ_NC, PIRQ_NC, PIRQ_NC}}, /* OHCI2: 13.0 */
- {EHCI2_DEVFN, {PIRQ_NC, PIRQ_EHCI2, PIRQ_NC, PIRQ_NC}}, /* EHCI2: 13.2 */
- {SMBUS_DEVFN, {PIRQ_SMBUS, PIRQ_NC, PIRQ_NC, PIRQ_NC}}, /* SMBUS: 14.0 */
- {HDA_DEVFN, {PIRQ_HDA, PIRQ_NC, PIRQ_NC, PIRQ_NC}}, /* HDA: 14.2 */
- {LPC_DEVFN, {PIRQ_C, PIRQ_NC, PIRQ_NC, PIRQ_NC }}, /* LPC: 14.3 */
- {SD_DEVFN, {PIRQ_SD, PIRQ_NC, PIRQ_NC, PIRQ_NC}}, /* SD: 14.7 */
-};
-
-/* PIRQ Setup */
-static void pirq_setup(void)
-{
- pirq_data_ptr = mainboard_pirq_data;
- pirq_data_size = ARRAY_SIZE(mainboard_pirq_data);
- intr_data_ptr = mainboard_intr_data;
- picr_data_ptr = mainboard_picr_data;
-}
-
-/**********************************************
- * enable the dedicated function in mainboard.
- **********************************************/
-static void mainboard_enable(struct device *dev)
-{
- /* Initialize the PIRQ data structures for consumption */
- pirq_setup();
-}
-
-struct chip_operations mainboard_ops = {
- .enable_dev = mainboard_enable,
-};