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-rw-r--r--src/mainboard/bachmann/ot200/Kconfig6
-rw-r--r--src/mainboard/bachmann/ot200/romstage.c6
2 files changed, 7 insertions, 5 deletions
diff --git a/src/mainboard/bachmann/ot200/Kconfig b/src/mainboard/bachmann/ot200/Kconfig
index a201bdec4b..5d185c0d70 100644
--- a/src/mainboard/bachmann/ot200/Kconfig
+++ b/src/mainboard/bachmann/ot200/Kconfig
@@ -12,6 +12,8 @@ config BOARD_SPECIFIC_OPTIONS # dummy
select BOARD_ROMSIZE_KB_2048
select POWER_BUTTON_DEFAULT_DISABLE
select DRIVERS_I2C_IDREG
+ select PLL_MANUAL_CONFIG
+ select CORE_GLIU_500_266
config MAINBOARD_DIR
string
@@ -25,4 +27,8 @@ config IRQ_SLOT_COUNT
int
default 6
+config PLLMSRlo
+ hex
+ default 0x07de001e
+
endif # BOARD_BACHMANN_OT200
diff --git a/src/mainboard/bachmann/ot200/romstage.c b/src/mainboard/bachmann/ot200/romstage.c
index 9edd5f7251..3a8ecad178 100644
--- a/src/mainboard/bachmann/ot200/romstage.c
+++ b/src/mainboard/bachmann/ot200/romstage.c
@@ -39,10 +39,6 @@ static inline int spd_read_byte(unsigned int device, unsigned int address)
return smbus_read_byte(device, address);
}
-#define ManualConf 1 /* Do automatic strapped PLL config */
-#define PLLMSRhi 0x0000039c /* CPU 500 MHz - GLIU 266 MHz */
-#define PLLMSRlo 0x07de001e
-
#include "northbridge/amd/lx/raminit.h"
#include "northbridge/amd/lx/pll_reset.c"
#include "northbridge/amd/lx/raminit.c"
@@ -75,7 +71,7 @@ void main(unsigned long bist)
/* Halt if there was a built in self test failure */
report_bist_failure(bist);
- pll_reset(ManualConf);
+ pll_reset();
cpuRegInit(0, DIMM0, DIMM1, DRAM_TERMINATED);