diff options
Diffstat (limited to 'src/mainboard/asus')
| -rw-r--r-- | src/mainboard/asus/p2b-d/auto.c | 5 | ||||
| -rw-r--r-- | src/mainboard/asus/p2b-ds/auto.c | 5 | ||||
| -rw-r--r-- | src/mainboard/asus/p2b-f/auto.c | 5 | ||||
| -rw-r--r-- | src/mainboard/asus/p2b/auto.c | 5 | ||||
| -rw-r--r-- | src/mainboard/asus/p3b-f/auto.c | 5 |
5 files changed, 25 insertions, 0 deletions
diff --git a/src/mainboard/asus/p2b-d/auto.c b/src/mainboard/asus/p2b-d/auto.c index 4857cd540f..7371ba7870 100644 --- a/src/mainboard/asus/p2b-d/auto.c +++ b/src/mainboard/asus/p2b-d/auto.c @@ -31,6 +31,7 @@ #include "pc80/serial.c" #include "arch/i386/lib/console.c" #include "lib/ramtest.c" +#include "southbridge/intel/i82371eb/i82371eb_enable_rom.c" #include "southbridge/intel/i82371eb/i82371eb_early_smbus.c" #include "northbridge/intel/i440bx/raminit.h" #include "lib/debug.c" @@ -61,6 +62,10 @@ static void main(unsigned long bist) uart_init(); console_init(); report_bist_failure(bist); + + /* Enable access to the full ROM chip, needed very early by CBFS. */ + i82371eb_enable_rom(PCI_DEV(0, 4, 0)); /* ISA bridge is 00:04.0. */ + enable_smbus(); /* dump_spd_registers(); */ sdram_set_registers(); diff --git a/src/mainboard/asus/p2b-ds/auto.c b/src/mainboard/asus/p2b-ds/auto.c index 141f444684..810d7e352b 100644 --- a/src/mainboard/asus/p2b-ds/auto.c +++ b/src/mainboard/asus/p2b-ds/auto.c @@ -31,6 +31,7 @@ #include "pc80/serial.c" #include "arch/i386/lib/console.c" #include "lib/ramtest.c" +#include "southbridge/intel/i82371eb/i82371eb_enable_rom.c" #include "southbridge/intel/i82371eb/i82371eb_early_smbus.c" #include "northbridge/intel/i440bx/raminit.h" #include "lib/debug.c" @@ -61,6 +62,10 @@ static void main(unsigned long bist) uart_init(); console_init(); report_bist_failure(bist); + + /* Enable access to the full ROM chip, needed very early by CBFS. */ + i82371eb_enable_rom(PCI_DEV(0, 4, 0)); /* ISA bridge is 00:04.0. */ + enable_smbus(); /* dump_spd_registers(); */ sdram_set_registers(); diff --git a/src/mainboard/asus/p2b-f/auto.c b/src/mainboard/asus/p2b-f/auto.c index 86b0759949..76d14ae15d 100644 --- a/src/mainboard/asus/p2b-f/auto.c +++ b/src/mainboard/asus/p2b-f/auto.c @@ -30,6 +30,7 @@ #include "pc80/serial.c" #include "arch/i386/lib/console.c" #include "lib/ramtest.c" +#include "southbridge/intel/i82371eb/i82371eb_enable_rom.c" #include "southbridge/intel/i82371eb/i82371eb_early_smbus.c" #include "northbridge/intel/i440bx/raminit.h" #include "lib/debug.c" @@ -61,6 +62,10 @@ static void main(unsigned long bist) uart_init(); console_init(); report_bist_failure(bist); + + /* Enable access to the full ROM chip, needed very early by CBFS. */ + i82371eb_enable_rom(PCI_DEV(0, 4, 0)); /* ISA bridge is 00:04.0. */ + enable_smbus(); /* dump_spd_registers(); */ sdram_set_registers(); diff --git a/src/mainboard/asus/p2b/auto.c b/src/mainboard/asus/p2b/auto.c index fa027e1127..2dfdb2432f 100644 --- a/src/mainboard/asus/p2b/auto.c +++ b/src/mainboard/asus/p2b/auto.c @@ -30,6 +30,7 @@ #include "pc80/serial.c" #include "arch/i386/lib/console.c" #include "lib/ramtest.c" +#include "southbridge/intel/i82371eb/i82371eb_enable_rom.c" #include "southbridge/intel/i82371eb/i82371eb_early_smbus.c" #include "northbridge/intel/i440bx/raminit.h" #include "lib/debug.c" @@ -58,6 +59,10 @@ static void main(unsigned long bist) uart_init(); console_init(); report_bist_failure(bist); + + /* Enable access to the full ROM chip, needed very early by CBFS. */ + i82371eb_enable_rom(PCI_DEV(0, 4, 0)); /* ISA bridge at 00:04.0. */ + enable_smbus(); /* dump_spd_registers(); */ sdram_set_registers(); diff --git a/src/mainboard/asus/p3b-f/auto.c b/src/mainboard/asus/p3b-f/auto.c index c9c64fc8e5..fb3169f8ad 100644 --- a/src/mainboard/asus/p3b-f/auto.c +++ b/src/mainboard/asus/p3b-f/auto.c @@ -30,6 +30,7 @@ #include "pc80/serial.c" #include "arch/i386/lib/console.c" #include "lib/ramtest.c" +#include "southbridge/intel/i82371eb/i82371eb_enable_rom.c" #include "southbridge/intel/i82371eb/i82371eb_early_smbus.c" #include "northbridge/intel/i440bx/raminit.h" #include "lib/debug.c" @@ -61,6 +62,10 @@ static void main(unsigned long bist) uart_init(); console_init(); report_bist_failure(bist); + + /* Enable access to the full ROM chip, needed very early by CBFS. */ + i82371eb_enable_rom(PCI_DEV(0, 4, 0)); /* ISA bridge is 00:04.0. */ + enable_smbus(); /* dump_spd_registers(); */ sdram_set_registers(); |