diff options
Diffstat (limited to 'src/mainboard/asus')
-rw-r--r-- | src/mainboard/asus/a8n_e/romstage.c | 13 | ||||
-rw-r--r-- | src/mainboard/asus/a8v-e_deluxe/romstage.c | 9 | ||||
-rw-r--r-- | src/mainboard/asus/a8v-e_se/romstage.c | 9 | ||||
-rw-r--r-- | src/mainboard/asus/m2v-mx_se/romstage.c | 9 | ||||
-rw-r--r-- | src/mainboard/asus/m2v/romstage.c | 9 | ||||
-rw-r--r-- | src/mainboard/asus/m4a785-m/romstage.c | 15 |
6 files changed, 14 insertions, 50 deletions
diff --git a/src/mainboard/asus/a8n_e/romstage.c b/src/mainboard/asus/a8n_e/romstage.c index f911a9beba..9558d055b1 100644 --- a/src/mainboard/asus/a8n_e/romstage.c +++ b/src/mainboard/asus/a8n_e/romstage.c @@ -50,15 +50,8 @@ #include "cpu/amd/dualcore/dualcore.c" #include <spd.h> -static void memreset(int controllers, const struct mem_controller *ctrl) -{ - /* Nothing to do. */ -} - -static inline void activate_spd_rom(const struct mem_controller *ctrl) -{ - /* Nothing to do. */ -} +static void memreset(int controllers, const struct mem_controller *ctrl) { } +static void activate_spd_rom(const struct mem_controller *ctrl) { } static inline int spd_read_byte(unsigned device, unsigned address) { @@ -108,7 +101,6 @@ void cache_as_ram_main(unsigned long bist, unsigned long cpu_init_detectedx) /* Nothing special needs to be done to find bus 0 */ /* Allow the HT devices to be found */ enumerate_ht_chain(); - sio_setup(); } @@ -138,7 +130,6 @@ void cache_as_ram_main(unsigned long bist, unsigned long cpu_init_detectedx) needs_reset |= ht_setup_chains_x(); needs_reset |= ck804_early_setup_x(); - if (needs_reset) { print_info("ht reset -\n"); soft_reset(); diff --git a/src/mainboard/asus/a8v-e_deluxe/romstage.c b/src/mainboard/asus/a8v-e_deluxe/romstage.c index 393e560be5..bf096e1033 100644 --- a/src/mainboard/asus/a8v-e_deluxe/romstage.c +++ b/src/mainboard/asus/a8v-e_deluxe/romstage.c @@ -52,19 +52,14 @@ unsigned int get_sbdn(unsigned bus); #define GPIO_DEV PNP_DEV(0x2e, W83627EHG_GPIO_SUSLED) #define ACPI_DEV PNP_DEV(0x2e, W83627EHG_ACPI) -static void memreset(int controllers, const struct mem_controller *ctrl) -{ -} +static void memreset(int controllers, const struct mem_controller *ctrl) { } +static void activate_spd_rom(const struct mem_controller *ctrl) { } static inline int spd_read_byte(unsigned device, unsigned address) { return smbus_read_byte(device, address); } -static void activate_spd_rom(const struct mem_controller *ctrl) -{ -} - #include <reset.h> void soft_reset(void) { diff --git a/src/mainboard/asus/a8v-e_se/romstage.c b/src/mainboard/asus/a8v-e_se/romstage.c index 393e560be5..bf096e1033 100644 --- a/src/mainboard/asus/a8v-e_se/romstage.c +++ b/src/mainboard/asus/a8v-e_se/romstage.c @@ -52,19 +52,14 @@ unsigned int get_sbdn(unsigned bus); #define GPIO_DEV PNP_DEV(0x2e, W83627EHG_GPIO_SUSLED) #define ACPI_DEV PNP_DEV(0x2e, W83627EHG_ACPI) -static void memreset(int controllers, const struct mem_controller *ctrl) -{ -} +static void memreset(int controllers, const struct mem_controller *ctrl) { } +static void activate_spd_rom(const struct mem_controller *ctrl) { } static inline int spd_read_byte(unsigned device, unsigned address) { return smbus_read_byte(device, address); } -static void activate_spd_rom(const struct mem_controller *ctrl) -{ -} - #include <reset.h> void soft_reset(void) { diff --git a/src/mainboard/asus/m2v-mx_se/romstage.c b/src/mainboard/asus/m2v-mx_se/romstage.c index a9cc6686cb..0849c862ba 100644 --- a/src/mainboard/asus/m2v-mx_se/romstage.c +++ b/src/mainboard/asus/m2v-mx_se/romstage.c @@ -54,19 +54,14 @@ unsigned int get_sbdn(unsigned bus); #define SERIAL_DEV PNP_DEV(0x2e, IT8712F_SP1) #define WATCHDOG_DEV PNP_DEV(0x2e, IT8712F_GPIO) -static void memreset(int controllers, const struct mem_controller *ctrl) -{ -} +static void memreset(int controllers, const struct mem_controller *ctrl) { } +static void activate_spd_rom(const struct mem_controller *ctrl) { } static inline int spd_read_byte(unsigned device, unsigned address) { return smbus_read_byte(device, address); } -static void activate_spd_rom(const struct mem_controller *ctrl) -{ -} - // defines S3_NVRAM_EARLY: #include "southbridge/via/k8t890/k8t890_early_car.c" #include "northbridge/amd/amdk8/amdk8.h" diff --git a/src/mainboard/asus/m2v/romstage.c b/src/mainboard/asus/m2v/romstage.c index 59b6c45bfc..d56ca9ce11 100644 --- a/src/mainboard/asus/m2v/romstage.c +++ b/src/mainboard/asus/m2v/romstage.c @@ -56,19 +56,14 @@ unsigned int get_sbdn(unsigned bus); #define IT8712F_GPIO_BASE 0x0a20 -static void memreset(int controllers, const struct mem_controller *ctrl) -{ -} +static void memreset(int controllers, const struct mem_controller *ctrl) { } +static void activate_spd_rom(const struct mem_controller *ctrl) { } static inline int spd_read_byte(unsigned device, unsigned address) { return smbus_read_byte(device, address); } -static void activate_spd_rom(const struct mem_controller *ctrl) -{ -} - // defines S3_NVRAM_EARLY: #include "southbridge/via/k8t890/k8t890_early_car.c" #include "northbridge/amd/amdk8/amdk8.h" diff --git a/src/mainboard/asus/m4a785-m/romstage.c b/src/mainboard/asus/m4a785-m/romstage.c index d59a468e35..ea93eee412 100644 --- a/src/mainboard/asus/m4a785-m/romstage.c +++ b/src/mainboard/asus/m4a785-m/romstage.c @@ -52,15 +52,11 @@ static int smbus_read_byte(u32 device, u32 address); #include "southbridge/amd/sb700/sb700_early_setup.c" #include "northbridge/amd/amdfam10/debug.c" -static void activate_spd_rom(const struct mem_controller *ctrl) -{ -} +static void activate_spd_rom(const struct mem_controller *ctrl) { } static int spd_read_byte(u32 device, u32 address) { - int result; - result = smbus_read_byte(device, address); - return result; + return smbus_read_byte(device, address); } #include "northbridge/amd/amdfam10/amdfam10.h" @@ -78,11 +74,9 @@ static int spd_read_byte(u32 device, u32 address) void cache_as_ram_main(unsigned long bist, unsigned long cpu_init_detectedx) { - struct sys_info *sysinfo = (struct sys_info *)(CONFIG_DCACHE_RAM_BASE + CONFIG_DCACHE_RAM_SIZE - CONFIG_DCACHE_RAM_GLOBAL_VAR_SIZE); static const u8 spd_addr[] = {RC00, DIMM0, DIMM2, 0, 0, DIMM1, DIMM3, 0, 0, }; - u32 bsp_apicid = 0; - u32 val; + u32 bsp_apicid = 0, val; msr_t msr; if (!cpu_init_detectedx && boot_cpu()) { @@ -91,7 +85,6 @@ void cache_as_ram_main(unsigned long bist, unsigned long cpu_init_detectedx) /* mov bsp to bus 0xff when > 8 nodes */ set_bsp_node_CHtExtNodeCfgEn(); enumerate_ht_chain(); - sb700_pci_port80(); } @@ -108,7 +101,7 @@ void cache_as_ram_main(unsigned long bist, unsigned long cpu_init_detectedx) sb700_lpc_init(); it8712f_enable_serial(0, CONFIG_TTYS0_BASE); - it8712f_kill_watchdog(); /* disable watchdog, so it does not reset while still booting */ + it8712f_kill_watchdog(); uart_init(); #if CONFIG_USBDEBUG |