diff options
Diffstat (limited to 'src/mainboard/asus')
-rw-r--r-- | src/mainboard/asus/a8v-e_se/romstage.c | 15 | ||||
-rw-r--r-- | src/mainboard/asus/m2v-mx_se/mainboard.c | 3 | ||||
-rw-r--r-- | src/mainboard/asus/m2v-mx_se/romstage.c | 30 |
3 files changed, 16 insertions, 32 deletions
diff --git a/src/mainboard/asus/a8v-e_se/romstage.c b/src/mainboard/asus/a8v-e_se/romstage.c index 1b7c99a079..c748498fb7 100644 --- a/src/mainboard/asus/a8v-e_se/romstage.c +++ b/src/mainboard/asus/a8v-e_se/romstage.c @@ -105,10 +105,11 @@ void soft_reset(void) #define K8_4RANK_DIMM_SUPPORT 1 #include "northbridge/amd/amdk8/amdk8.h" -#include "northbridge/amd/amdk8/raminit.c" -#include "northbridge/amd/amdk8/coherent_ht.c" #include "northbridge/amd/amdk8/incoherent_ht.c" +#include "northbridge/amd/amdk8/coherent_ht.c" +#include "northbridge/amd/amdk8/raminit.c" #include "lib/generic_sdram.c" + #include "cpu/amd/dualcore/dualcore.c" #include "southbridge/via/k8t890/k8t890_early_car.c" @@ -126,7 +127,7 @@ unsigned int get_sbdn(unsigned bus) return (dev >> 15) & 0x1f; } -void sio_init(void) +static void sio_init(void) { u8 reg; @@ -171,17 +172,17 @@ void sio_init(void) void cache_as_ram_main(unsigned long bist, unsigned long cpu_init_detectedx) { static const uint16_t spd_addr[] = { + // Node 0 (0xa << 3) | 0, (0xa << 3) | 2, 0, 0, (0xa << 3) | 1, (0xa << 3) | 3, 0, 0, -#if CONFIG_MAX_PHYSICAL_CPUS > 1 + // Node 1 (0xa << 3) | 4, (0xa << 3) | 6, 0, 0, (0xa << 3) | 5, (0xa << 3) | 7, 0, 0, -#endif }; unsigned bsp_apicid = 0; int needs_reset = 0; - struct sys_info *sysinfo = - (CONFIG_DCACHE_RAM_BASE + CONFIG_DCACHE_RAM_SIZE - CONFIG_DCACHE_RAM_GLOBAL_VAR_SIZE); + struct sys_info *sysinfo = (struct sys_info *)(CONFIG_DCACHE_RAM_BASE + + CONFIG_DCACHE_RAM_SIZE - CONFIG_DCACHE_RAM_GLOBAL_VAR_SIZE); sio_init(); w83627ehg_enable_serial(SERIAL_DEV, CONFIG_TTYS0_BASE); diff --git a/src/mainboard/asus/m2v-mx_se/mainboard.c b/src/mainboard/asus/m2v-mx_se/mainboard.c index 4d53091882..4b6f322498 100644 --- a/src/mainboard/asus/m2v-mx_se/mainboard.c +++ b/src/mainboard/asus/m2v-mx_se/mainboard.c @@ -21,9 +21,8 @@ #include <device/pci.h> #include <device/pci_ids.h> #include <boot/tables.h> -#include <arch/coreboot_tables.h> -#include "chip.h" #include <southbridge/via/k8t890/k8t890.h> +#include "chip.h" int add_mainboard_resources(struct lb_memory *mem) { diff --git a/src/mainboard/asus/m2v-mx_se/romstage.c b/src/mainboard/asus/m2v-mx_se/romstage.c index e2c5ba5b94..3ece7aa22b 100644 --- a/src/mainboard/asus/m2v-mx_se/romstage.c +++ b/src/mainboard/asus/m2v-mx_se/romstage.c @@ -70,10 +70,6 @@ unsigned int get_sbdn(unsigned bus); #define SERIAL_DEV PNP_DEV(0x2e, IT8712F_SP1) #define WATCHDOG_DEV PNP_DEV(0x2e, IT8712F_GPIO) -static void memreset_setup(void) -{ -} - static void memreset(int controllers, const struct mem_controller *ctrl) { } @@ -83,18 +79,20 @@ static inline int spd_read_byte(unsigned device, unsigned address) return smbus_read_byte(device, address); } -void activate_spd_rom(const struct mem_controller *ctrl) +static void activate_spd_rom(const struct mem_controller *ctrl) { } #define K8_4RANK_DIMM_SUPPORT 1 #include "southbridge/via/k8t890/k8t890_early_car.c" + #include "northbridge/amd/amdk8/amdk8.h" -#include "northbridge/amd/amdk8/raminit_f.c" -#include "northbridge/amd/amdk8/coherent_ht.c" #include "northbridge/amd/amdk8/incoherent_ht.c" +#include "northbridge/amd/amdk8/coherent_ht.c" +#include "northbridge/amd/amdk8/raminit_f.c" #include "lib/generic_sdram.c" + #include "cpu/amd/dualcore/dualcore.c" #include "cpu/amd/car/post_cache_as_ram.c" @@ -144,34 +142,21 @@ unsigned int get_sbdn(unsigned bus) return (dev >> 15) & 0x1f; } -void sio_init(void) -{ - -} - -void real_main(unsigned long bist, unsigned long cpu_init_detectedx); - void cache_as_ram_main(unsigned long bist, unsigned long cpu_init_detectedx) { - real_main(bist, cpu_init_detectedx); -} - -void real_main(unsigned long bist, unsigned long cpu_init_detectedx) -{ static const uint16_t spd_addr[] = { + // Node 0 (0xa << 3) | 0, (0xa << 3) | 2, 0, 0, (0xa << 3) | 1, (0xa << 3) | 3, 0, 0, -#if CONFIG_MAX_PHYSICAL_CPUS > 1 + // Node 1 (0xa << 3) | 4, (0xa << 3) | 6, 0, 0, (0xa << 3) | 5, (0xa << 3) | 7, 0, 0, -#endif }; unsigned bsp_apicid = 0; int needs_reset = 0; struct sys_info *sysinfo = (struct sys_info *)(CONFIG_DCACHE_RAM_BASE + CONFIG_DCACHE_RAM_SIZE - CONFIG_DCACHE_RAM_GLOBAL_VAR_SIZE); - sio_init(); it8712f_enable_serial(SERIAL_DEV, CONFIG_TTYS0_BASE); it8712f_kill_watchdog(); it8712f_enable_3vsbsw(); @@ -234,7 +219,6 @@ void real_main(unsigned long bist, unsigned long cpu_init_detectedx) /* It's the time to set ctrl now. */ fill_mem_ctrl(sysinfo->nodes, sysinfo->ctrl, spd_addr); enable_smbus(); - memreset_setup(); sdram_initialize(sysinfo->nodes, sysinfo->ctrl, sysinfo); post_cache_as_ram(); } |