diff options
Diffstat (limited to 'src/mainboard/asus')
| -rw-r--r-- | src/mainboard/asus/f2a85-m/get_bus_conf.c | 8 | ||||
| -rw-r--r-- | src/mainboard/asus/f2a85-m/mptable.c | 28 |
2 files changed, 12 insertions, 24 deletions
diff --git a/src/mainboard/asus/f2a85-m/get_bus_conf.c b/src/mainboard/asus/f2a85-m/get_bus_conf.c index fe8253ee03..81417e7d8f 100644 --- a/src/mainboard/asus/f2a85-m/get_bus_conf.c +++ b/src/mainboard/asus/f2a85-m/get_bus_conf.c @@ -31,14 +31,9 @@ * and acpi_tables busnum is default. */ u8 bus_hudson[6]; -u32 apicid_hudson; - - void get_bus_conf(void) { - u32 apicid_base; - device_t dev; int i; @@ -62,7 +57,4 @@ void get_bus_conf(void) } } - /* I/O APICs: APIC ID Version State Address */ - apicid_base = CONFIG_MAX_CPUS; - apicid_hudson = apicid_base; } diff --git a/src/mainboard/asus/f2a85-m/mptable.c b/src/mainboard/asus/f2a85-m/mptable.c index 3316b83922..cc81819d1c 100644 --- a/src/mainboard/asus/f2a85-m/mptable.c +++ b/src/mainboard/asus/f2a85-m/mptable.c @@ -19,6 +19,7 @@ #include <arch/cpu.h> #include <arch/io.h> +#include <arch/ioapic.h> #include <arch/smp/mpspec.h> #include <cpu/amd/amdfam15.h> #include <cpu/x86/lapic.h> @@ -27,8 +28,6 @@ #include <string.h> #include "southbridge/amd/agesa/hudson/hudson.h" /* pm_ioread() */ -#define IO_APIC_ID CONFIG_MAX_CPUS -extern u32 apicid_hudson; u8 picr_data[] = { 0x1F,0x1F,0x1F,0x1F,0x1F,0x1F,0x1F,0x1F,0x0A,0xF1,0x00,0x00,0x1F,0x1F,0x1F,0x1F, @@ -69,9 +68,16 @@ static void *smp_write_config_table(void *v) { struct mp_config_table *mc; int bus_isa; - u32 dword; u8 byte; + /* + * By the time this function gets called, the IOAPIC registers + * have been written so they can be read to get the correct + * APIC ID and Version + */ + u8 ioapic_id = (io_apic_read(IO_APIC_ADDR, 0x00) >> 24); + u8 ioapic_ver = (io_apic_read(IO_APIC_ADDR, 0x01) & 0xFF); + mc = (void *)(((char *)v) + SMP_FLOATING_TABLE_LEN); mptable_init(mc, LOCAL_APIC_ADDR); @@ -86,17 +92,7 @@ static void *smp_write_config_table(void *v) my_smp_write_bus(mc, bus_isa, "ISA "); /* I/O APICs: APIC ID Version State Address */ - - dword = 0; - dword = pm_read8(0x34) & 0xF0; - dword |= (pm_read8(0x35) & 0xFF) << 8; - dword |= (pm_read8(0x36) & 0xFF) << 16; - dword |= (pm_read8(0x37) & 0xFF) << 24; - /* Set IO APIC ID onto IO_APIC_ID */ - write32 (dword, 0x00); - write32 (dword + 0x10, IO_APIC_ID << 24); - apicid_hudson = IO_APIC_ID; - smp_write_ioapic(mc, apicid_hudson, 0x21, dword); + smp_write_ioapic(mc, ioapic_id, ioapic_ver, IO_APIC_ADDR); /* PIC IRQ routine */ for (byte = 0x0; byte < sizeof(picr_data); byte ++) { @@ -113,13 +109,13 @@ static void *smp_write_config_table(void *v) /* I/O Ints: Type Polarity Trigger Bus ID IRQ APIC ID PIN# */ #define IO_LOCAL_INT(type, intr, apicid, pin) \ smp_write_lintsrc(mc, (type), MP_IRQ_TRIGGER_EDGE | MP_IRQ_POLARITY_HIGH, bus_isa, (intr), (apicid), (pin)); - mptable_add_isa_interrupts(mc, bus_isa, apicid_hudson, 0); + mptable_add_isa_interrupts(mc, bus_isa, ioapic_id, 0); /* PCI interrupts are level triggered, and are * associated with a specific bus/device/function tuple. */ #define PCI_INT(bus, dev, int_sign, pin) \ - smp_write_intsrc(mc, mp_INT, MP_IRQ_TRIGGER_LEVEL|MP_IRQ_POLARITY_LOW, (bus), (((dev)<<2)|(int_sign)), apicid_hudson, (pin)) + smp_write_intsrc(mc, mp_INT, MP_IRQ_TRIGGER_LEVEL|MP_IRQ_POLARITY_LOW, (bus), (((dev)<<2)|(int_sign)), ioapic_id, (pin)) /* IOMMU */ PCI_INT(0x0, 0x0, 0x0, 0x10); |