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-rw-r--r--src/mainboard/asus/h61-series/devicetree.cb1
-rw-r--r--src/mainboard/asus/maximus_iv_gene-z/devicetree.cb1
-rw-r--r--src/mainboard/asus/p8z77-series/devicetree.cb1
3 files changed, 0 insertions, 3 deletions
diff --git a/src/mainboard/asus/h61-series/devicetree.cb b/src/mainboard/asus/h61-series/devicetree.cb
index 07c0a866c3..32f0cd4d59 100644
--- a/src/mainboard/asus/h61-series/devicetree.cb
+++ b/src/mainboard/asus/h61-series/devicetree.cb
@@ -16,7 +16,6 @@ chip northbridge/intel/sandybridge
device pci 02.0 on end # iGPU
chip southbridge/intel/bd82x6x
- register "c2_latency" = "0x0065"
register "sata_port_map" = "0x33"
register "spi_lvscc" = "0x2005"
register "spi_uvscc" = "0x2005"
diff --git a/src/mainboard/asus/maximus_iv_gene-z/devicetree.cb b/src/mainboard/asus/maximus_iv_gene-z/devicetree.cb
index 5860556efe..ca09d2f685 100644
--- a/src/mainboard/asus/maximus_iv_gene-z/devicetree.cb
+++ b/src/mainboard/asus/maximus_iv_gene-z/devicetree.cb
@@ -19,7 +19,6 @@ chip northbridge/intel/sandybridge
device pci 02.0 on end # VGA controller
chip southbridge/intel/bd82x6x
- register "c2_latency" = "101"
register "gen1_dec" = "0x00000295" # Super I/O HWM
register "sata_port_map" = "0x3f"
register "spi_lvscc" = "0x2005"
diff --git a/src/mainboard/asus/p8z77-series/devicetree.cb b/src/mainboard/asus/p8z77-series/devicetree.cb
index 1b9d14d4f4..9710118ed7 100644
--- a/src/mainboard/asus/p8z77-series/devicetree.cb
+++ b/src/mainboard/asus/p8z77-series/devicetree.cb
@@ -16,7 +16,6 @@ chip northbridge/intel/sandybridge
device pci 02.0 on end # iGPU
chip southbridge/intel/bd82x6x
- register "c2_latency" = "0x0065"
register "sata_interface_speed_support" = "0x3"
register "sata_port_map" = "0x3f"
register "spi_lvscc" = "0x2005"