diff options
Diffstat (limited to 'src/mainboard/asus')
-rw-r--r-- | src/mainboard/asus/m4a78-em/romstage.c | 3 | ||||
-rw-r--r-- | src/mainboard/asus/m4a785-m/romstage.c | 3 | ||||
-rw-r--r-- | src/mainboard/asus/m5a88-v/romstage.c | 3 |
3 files changed, 3 insertions, 6 deletions
diff --git a/src/mainboard/asus/m4a78-em/romstage.c b/src/mainboard/asus/m4a78-em/romstage.c index f616d570fc..6392f8f459 100644 --- a/src/mainboard/asus/m4a78-em/romstage.c +++ b/src/mainboard/asus/m4a78-em/romstage.c @@ -46,7 +46,7 @@ #include <arch/early_variables.h> #include <cbmem.h> #include <spd.h> -#include "southbridge/amd/rs780/early_setup.c" +#include <southbridge/amd/rs780/rs780.h> #include "resourcemap.c" #include "cpu/amd/quadcore/quadcore.c" @@ -216,7 +216,6 @@ void cache_as_ram_main(unsigned long bist, unsigned long cpu_init_detectedx) // die("After MCT init before CAR disabled."); - rs780_before_pci_init(); sb7xx_51xx_before_pci_init(); post_code(0x42); diff --git a/src/mainboard/asus/m4a785-m/romstage.c b/src/mainboard/asus/m4a785-m/romstage.c index d6cc5784ec..dd61c8f7a4 100644 --- a/src/mainboard/asus/m4a785-m/romstage.c +++ b/src/mainboard/asus/m4a785-m/romstage.c @@ -47,7 +47,7 @@ #include <arch/early_variables.h> #include <cbmem.h> #include <spd.h> -#include "southbridge/amd/rs780/early_setup.c" +#include <southbridge/amd/rs780/rs780.h> #include "resourcemap.c" #include "cpu/amd/quadcore/quadcore.c" @@ -217,7 +217,6 @@ void cache_as_ram_main(unsigned long bist, unsigned long cpu_init_detectedx) // die("After MCT init before CAR disabled."); - rs780_before_pci_init(); sb7xx_51xx_before_pci_init(); post_code(0x42); diff --git a/src/mainboard/asus/m5a88-v/romstage.c b/src/mainboard/asus/m5a88-v/romstage.c index 2993cb4676..e3f3f3cfee 100644 --- a/src/mainboard/asus/m5a88-v/romstage.c +++ b/src/mainboard/asus/m5a88-v/romstage.c @@ -44,7 +44,7 @@ #include <cpu/amd/family_10h-family_15h/init_cpus.h> #include <arch/early_variables.h> #include <cbmem.h> -#include "southbridge/amd/rs780/early_setup.c" +#include <southbridge/amd/rs780/rs780.h> #include "southbridge/amd/sb800/early_setup.c" #include "spd.h" #include <reset.h> @@ -221,7 +221,6 @@ void cache_as_ram_main(unsigned long bist, unsigned long cpu_init_detectedx) // die("After MCT init before CAR disabled."); - rs780_before_pci_init(); sb800_before_pci_init(); post_code(0x42); |