diff options
Diffstat (limited to 'src/mainboard/asus/p2b')
| -rw-r--r-- | src/mainboard/asus/p2b/Kconfig | 8 | ||||
| -rw-r--r-- | src/mainboard/asus/p2b/Kconfig.name | 3 | ||||
| -rw-r--r-- | src/mainboard/asus/p2b/variants/p2b-ds/board_info.txt | 7 | ||||
| -rw-r--r-- | src/mainboard/asus/p2b/variants/p2b-ds/devicetree.cb | 63 | ||||
| -rw-r--r-- | src/mainboard/asus/p2b/variants/p2b-ds/irq_tables.c | 45 | ||||
| -rw-r--r-- | src/mainboard/asus/p2b/variants/p2b-ds/mptable.c | 56 |
6 files changed, 179 insertions, 3 deletions
diff --git a/src/mainboard/asus/p2b/Kconfig b/src/mainboard/asus/p2b/Kconfig index 36d882fe35..3895990eaa 100644 --- a/src/mainboard/asus/p2b/Kconfig +++ b/src/mainboard/asus/p2b/Kconfig @@ -11,7 +11,7 @@ ## MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the ## GNU General Public License for more details. ## -if BOARD_ASUS_P2B || BOARD_ASUS_P2B_D || BOARD_ASUS_P2B_F || BOARD_ASUS_P2B_LS +if BOARD_ASUS_P2B || BOARD_ASUS_P2B_D || BOARD_ASUS_P2B_DS || BOARD_ASUS_P2B_F || BOARD_ASUS_P2B_LS config BASE_ASUS_P2B_D def_bool n @@ -30,7 +30,7 @@ config BOARD_SPECIFIC_OPTIONS select BOARD_ROMSIZE_KB_256 select SDRAMPWR_4DIMM if BOARD_ASUS_P2B_LS select HAVE_ACPI_TABLES if BOARD_ASUS_P2B || BOARD_ASUS_P2B_LS - select BASE_ASUS_P2B_D if BOARD_ASUS_P2B_D + select BASE_ASUS_P2B_D if BOARD_ASUS_P2B_D || BOARD_ASUS_P2B_DS config MAX_CPUS int @@ -44,6 +44,7 @@ config MAINBOARD_PART_NUMBER string default "P2B" if BOARD_ASUS_P2B default "P2B-D" if BOARD_ASUS_P2B_D + default "P2B-DS" if BOARD_ASUS_P2B_DS default "P2B-F" if BOARD_ASUS_P2B_F default "P2B-LS" if BOARD_ASUS_P2B_LS @@ -51,6 +52,7 @@ config VARIANT_DIR string default "p2b" if BOARD_ASUS_P2B default "p2b-d" if BOARD_ASUS_P2B_D + default "p2b-ds" if BOARD_ASUS_P2B_DS default "p2b-f" if BOARD_ASUS_P2B_F default "p2b-ls" if BOARD_ASUS_P2B_LS @@ -61,7 +63,7 @@ config DEVICETREE config IRQ_SLOT_COUNT int default 8 if BOARD_ASUS_P2B_LS - default 7 if BOARD_ASUS_P2B_F + default 7 if BOARD_ASUS_P2B_F || BOARD_ASUS_P2B_DS default 6 endif diff --git a/src/mainboard/asus/p2b/Kconfig.name b/src/mainboard/asus/p2b/Kconfig.name index 8c42258af8..106e69445e 100644 --- a/src/mainboard/asus/p2b/Kconfig.name +++ b/src/mainboard/asus/p2b/Kconfig.name @@ -4,6 +4,9 @@ config BOARD_ASUS_P2B config BOARD_ASUS_P2B_D bool "P2B-D" +config BOARD_ASUS_P2B_DS + bool "P2B-DS" + config BOARD_ASUS_P2B_F bool "P2B-F" diff --git a/src/mainboard/asus/p2b/variants/p2b-ds/board_info.txt b/src/mainboard/asus/p2b/variants/p2b-ds/board_info.txt new file mode 100644 index 0000000000..29a7266fd7 --- /dev/null +++ b/src/mainboard/asus/p2b/variants/p2b-ds/board_info.txt @@ -0,0 +1,7 @@ +Category: desktop +Board URL: ftp://ftp.asus.com.tw/pub/ASUS/mb/slot1/440bx/p2b-ds/ +ROM package: DIP32 +ROM protocol: Parallel +ROM socketed: y +Flashrom support: y +Release year: 1998 diff --git a/src/mainboard/asus/p2b/variants/p2b-ds/devicetree.cb b/src/mainboard/asus/p2b/variants/p2b-ds/devicetree.cb new file mode 100644 index 0000000000..b8e9e8580f --- /dev/null +++ b/src/mainboard/asus/p2b/variants/p2b-ds/devicetree.cb @@ -0,0 +1,63 @@ +chip northbridge/intel/i440bx # Northbridge + device cpu_cluster 0 on # (L)APIC cluster + chip cpu/intel/slot_1 # CPU socket 0 + device lapic 0 on end # Local APIC of CPU 0 + end + chip cpu/intel/slot_1 # CPU socket 1 + device lapic 1 on end # Local APIC of CPU 1 + end + end + device domain 0 on # PCI domain + device pci 0.0 on end # Host bridge + device pci 1.0 on end # PCI/AGP bridge + chip southbridge/intel/i82371eb # Southbridge + device pci 4.0 on # ISA bridge + chip superio/winbond/w83977tf # Super I/O + device pnp 3f0.0 on # Floppy + io 0x60 = 0x3f0 + irq 0x70 = 6 + drq 0x74 = 2 + end + device pnp 3f0.1 on # Parallel port + io 0x60 = 0x378 + irq 0x70 = 7 + end + device pnp 3f0.2 on # COM1 + io 0x60 = 0x3f8 + irq 0x70 = 4 + end + device pnp 3f0.3 on # COM2 / IR + io 0x60 = 0x2f8 + irq 0x70 = 3 + end + device pnp 3f0.5 on # PS/2 keyboard / mouse + io 0x60 = 0x60 + io 0x62 = 0x64 + irq 0x70 = 1 # PS/2 keyboard interrupt + irq 0x72 = 12 # PS/2 mouse interrupt + end + device pnp 3f0.7 on # GPIO 1 + end + device pnp 3f0.8 on # GPIO 2 + end + device pnp 3f0.9 on # GPIO 3 + end + device pnp 3f0.a on # ACPI + end + end + end + device pci 4.1 on end # IDE + device pci 4.2 on end # USB + device pci 4.3 on end # ACPI + device pci 6.0 on end # Onboard SCSI + register "ide0_enable" = "1" + register "ide1_enable" = "1" + register "ide_legacy_enable" = "1" + # Enable UDMA/33 for higher speed if your IDE device(s) support it. + register "ide0_drive0_udma33_enable" = "1" + register "ide0_drive1_udma33_enable" = "1" + register "ide1_drive0_udma33_enable" = "1" + register "ide1_drive1_udma33_enable" = "1" + end + end +end diff --git a/src/mainboard/asus/p2b/variants/p2b-ds/irq_tables.c b/src/mainboard/asus/p2b/variants/p2b-ds/irq_tables.c new file mode 100644 index 0000000000..2da3346988 --- /dev/null +++ b/src/mainboard/asus/p2b/variants/p2b-ds/irq_tables.c @@ -0,0 +1,45 @@ +/* + * This file is part of the coreboot project. + * + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; either version 2 of the License, or + * (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + */ + +#include <arch/pirq_routing.h> + +static const struct irq_routing_table intel_irq_routing_table = { + PIRQ_SIGNATURE, + PIRQ_VERSION, + 32 + 16 * CONFIG_IRQ_SLOT_COUNT,/* Max. number of devices on the bus */ + 0x00, /* Interrupt router bus */ + (0x04 << 3) | 0x0, /* Interrupt router device */ + 0, /* IRQs devoted exclusively to PCI usage */ + 0x8086, /* Vendor */ + 0x122e, /* Device */ + 0, /* Miniport data */ + { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, /* u8 rfu[11] */ + 0x36, /* Checksum */ + { + /* bus, dev | fn, {link, bitmap}, {link, bitmap}, {link, bitmap}, {link, bitmap}, slot, rfu */ + {0x00, (0x0c << 3) | 0x0, {{0x60, 0x1eb8}, {0x61, 0x1eb8}, {0x62, 0x1eb8}, {0x63, 0x1eb8}}, 0x1, 0x0}, + {0x00, (0x0b << 3) | 0x0, {{0x61, 0x1eb8}, {0x62, 0x1eb8}, {0x63, 0x1eb8}, {0x60, 0x1eb8}}, 0x2, 0x0}, + {0x00, (0x0a << 3) | 0x0, {{0x62, 0x1eb8}, {0x63, 0x1eb8}, {0x60, 0x1eb8}, {0x61, 0x1eb8}}, 0x3, 0x0}, + {0x00, (0x09 << 3) | 0x0, {{0x63, 0x1eb8}, {0x60, 0x1eb8}, {0x61, 0x1eb8}, {0x62, 0x1eb8}}, 0x4, 0x0}, + {0x00, (0x04 << 3) | 0x0, {{0x60, 0x1eb8}, {0x61, 0x1eb8}, {0x62, 0x1eb8}, {0x63, 0x1eb8}}, 0x0, 0x0}, + {0x00, (0x01 << 3) | 0x0, {{0x60, 0x1eb8}, {0x61, 0x1eb8}, {0x62, 0x1eb8}, {0x63, 0x1eb8}}, 0x0, 0x0}, + {0x00, (0x06 << 3) | 0x0, {{0x63, 0x1eb8}, {0x60, 0x1eb8}, {0x61, 0x1eb8}, {0x62, 0x1eb8}}, 0x0, 0x0}, + } +}; + +unsigned long write_pirq_routing_table(unsigned long addr) +{ + return copy_pirq_routing_table(addr, &intel_irq_routing_table); +} diff --git a/src/mainboard/asus/p2b/variants/p2b-ds/mptable.c b/src/mainboard/asus/p2b/variants/p2b-ds/mptable.c new file mode 100644 index 0000000000..a180194b30 --- /dev/null +++ b/src/mainboard/asus/p2b/variants/p2b-ds/mptable.c @@ -0,0 +1,56 @@ +/* + * This file is part of the coreboot project. + * + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; either version 2 of the License, or + * (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + */ + +#include <arch/smp/mpspec.h> +#include <arch/ioapic.h> +#include <stdint.h> + +static void *smp_write_config_table(void *v) +{ + int ioapic_id, ioapic_ver, isa_bus; + struct mp_config_table *mc; + + mc = (void *)(((char *)v) + SMP_FLOATING_TABLE_LEN); + + mptable_init(mc, LOCAL_APIC_ADDR); + + smp_write_processors(mc); + + mptable_write_buses(mc, NULL, &isa_bus); + + ioapic_id = 2; + ioapic_ver = 0x11; /* External Intel 82093AA IOAPIC. */ + smp_write_ioapic(mc, ioapic_id, ioapic_ver, VIO_APIC_VADDR); + + /* Legacy Interrupts */ + mptable_add_isa_interrupts(mc, isa_bus, ioapic_id, 0); + + /* I/O Ints: Type Trigger Polarity Bus ID IRQ APIC ID PIN# */ + smp_write_intsrc(mc, mp_INT, MP_IRQ_TRIGGER_LEVEL | MP_IRQ_POLARITY_LOW, 0x0, 0x13, ioapic_id, 0x13); + smp_write_intsrc(mc, mp_INT, MP_IRQ_TRIGGER_LEVEL | MP_IRQ_POLARITY_LOW, 0x0, 0x18, ioapic_id, 0x13); + + /* Local Ints: Type Trigger Polarity Bus ID IRQ APIC ID PIN# */ + mptable_lintsrc(mc, 0x1); + + /* Compute the checksums. */ + return mptable_finalize(mc); +} + +unsigned long write_smp_table(unsigned long addr) +{ + void *v; + v = smp_write_floating_table(addr, 0); + return (unsigned long)smp_write_config_table(v); +} |