summaryrefslogtreecommitdiff
path: root/src/mainboard/asus/p2b-d/mptable.c
diff options
context:
space:
mode:
Diffstat (limited to 'src/mainboard/asus/p2b-d/mptable.c')
-rw-r--r--src/mainboard/asus/p2b-d/mptable.c42
1 files changed, 18 insertions, 24 deletions
diff --git a/src/mainboard/asus/p2b-d/mptable.c b/src/mainboard/asus/p2b-d/mptable.c
index 12ca7891eb..699cbea3d1 100644
--- a/src/mainboard/asus/p2b-d/mptable.c
+++ b/src/mainboard/asus/p2b-d/mptable.c
@@ -27,6 +27,7 @@
static void *smp_write_config_table(void *v)
{
+ int ioapic_id, ioapic_ver, isa_bus;
struct mp_config_table *mc;
mc = (void *)(((char *)v) + SMP_FLOATING_TABLE_LEN);
@@ -35,13 +36,12 @@ static void *smp_write_config_table(void *v)
smp_write_processors(mc);
- /* Bus: Bus ID Type */
- smp_write_bus(mc, 0, "PCI ");
- smp_write_bus(mc, 1, "PCI ");
- smp_write_bus(mc, 2, "ISA ");
+ mptable_write_buses(mc, NULL, &isa_bus);
+
+ ioapic_id = 2;
+ ioapic_ver = 0x11; /* External Intel 82093AA IOAPIC. */
+ smp_write_ioapic(mc, ioapic_id, ioapic_ver, IO_APIC_ADDR);
- /* I/O APICs: APIC ID Version State Address */
- smp_write_ioapic(mc, 2, 0x20, IO_APIC_ADDR);
{
device_t dev;
struct resource *res;
@@ -49,45 +49,39 @@ static void *smp_write_config_table(void *v)
if (dev) {
res = find_resource(dev, PCI_BASE_ADDRESS_0);
if (res)
- smp_write_ioapic(mc, 3, 0x20, res->base);
+ smp_write_ioapic(mc, 3, ioapic_ver, res->base);
}
dev = dev_find_slot(1, PCI_DEVFN(0x1c, 0));
if (dev) {
res = find_resource(dev, PCI_BASE_ADDRESS_0);
if (res)
- smp_write_ioapic(mc, 4, 0x20, res->base);
+ smp_write_ioapic(mc, 4, ioapic_ver, res->base);
}
dev = dev_find_slot(4, PCI_DEVFN(0x1e, 0));
if (dev) {
res = find_resource(dev, PCI_BASE_ADDRESS_0);
if (res)
- smp_write_ioapic(mc, 5, 0x20, res->base);
+ smp_write_ioapic(mc, 5, ioapic_ver, res->base);
}
dev = dev_find_slot(4, PCI_DEVFN(0x1c, 0));
if (dev) {
res = find_resource(dev, PCI_BASE_ADDRESS_0);
if (res)
- smp_write_ioapic(mc, 8, 0x20, res->base);
+ smp_write_ioapic(mc, 8, ioapic_ver, res->base);
}
}
- mptable_add_isa_interrupts(mc, 0x2, 0x2, 0);
-
- smp_write_intsrc(mc, mp_INT, MP_IRQ_TRIGGER_LEVEL | MP_IRQ_POLARITY_LOW,
- 0x2, 0xb, 0x2, 0x10);
- smp_write_intsrc(mc, mp_INT, MP_IRQ_TRIGGER_LEVEL | MP_IRQ_POLARITY_LOW,
- 0x2, 0xa, 0x2, 0x13);
+ /* Legacy Interrupts */
+ mptable_add_isa_interrupts(mc, isa_bus, ioapic_id, 0);
- /* Local Ints: Type Polarity Trigger Bus ID IRQ APIC ID PIN# */
- smp_write_lintsrc(mc, mp_ExtINT,
- MP_IRQ_TRIGGER_EDGE | MP_IRQ_POLARITY_HIGH, 0x2, 0x0,
- MP_APIC_ALL, 0x0);
- smp_write_lintsrc(mc, mp_NMI, MP_IRQ_TRIGGER_EDGE | MP_IRQ_POLARITY_HIGH,
- 0x2, 0x0, MP_APIC_ALL, 0x1);
+ /* I/O Ints: Type Trigger Polarity Bus ID IRQ APIC ID PIN# */
+ smp_write_intsrc(mc, mp_INT, MP_IRQ_TRIGGER_LEVEL | MP_IRQ_POLARITY_LOW, 0x0, 0x13, ioapic_id, 0x13); /* UHCI */
- /* There is no extension information... */
+ /* Local Ints: Type Trigger Polarity Bus ID IRQ APIC ID PIN# */
+ smp_write_lintsrc(mc, mp_ExtINT, MP_IRQ_TRIGGER_EDGE | MP_IRQ_POLARITY_HIGH, isa_bus, 0x0, MP_APIC_ALL, 0x0);
+ smp_write_lintsrc(mc, mp_NMI, MP_IRQ_TRIGGER_EDGE | MP_IRQ_POLARITY_HIGH, isa_bus, 0x0, MP_APIC_ALL, 0x1);
- /* Compute the checksums */
+ /* Compute the checksums. */
mc->mpe_checksum =
smp_compute_checksum(smp_next_mpc_entry(mc), mc->mpe_length);
mc->mpc_checksum = smp_compute_checksum(mc, mc->mpc_length);