aboutsummaryrefslogtreecommitdiff
path: root/src/mainboard/asus/m4a78-em/romstage.c
diff options
context:
space:
mode:
Diffstat (limited to 'src/mainboard/asus/m4a78-em/romstage.c')
-rw-r--r--src/mainboard/asus/m4a78-em/romstage.c4
1 files changed, 2 insertions, 2 deletions
diff --git a/src/mainboard/asus/m4a78-em/romstage.c b/src/mainboard/asus/m4a78-em/romstage.c
index 1076bf601c..3261fc771e 100644
--- a/src/mainboard/asus/m4a78-em/romstage.c
+++ b/src/mainboard/asus/m4a78-em/romstage.c
@@ -141,7 +141,7 @@ void cache_as_ram_main(unsigned long bist, unsigned long cpu_init_detectedx)
*/
wait_all_core0_started();
- #if CONFIG_LOGICAL_CPUS
+ #if IS_ENABLED(CONFIG_LOGICAL_CPUS)
/* Core0 on each node is configured. Now setup any additional cores. */
printk(BIOS_DEBUG, "start_other_cores()\n");
start_other_cores(bsp_apicid);
@@ -155,7 +155,7 @@ void cache_as_ram_main(unsigned long bist, unsigned long cpu_init_detectedx)
rs780_early_setup();
sb7xx_51xx_early_setup();
- #if CONFIG_SET_FIDVID
+ #if IS_ENABLED(CONFIG_SET_FIDVID)
msr = rdmsr(0xc0010071);
printk(BIOS_DEBUG, "\nBegin FIDVID MSR 0xc0010071 0x%08x 0x%08x\n", msr.hi, msr.lo);