3 files changed, 20 insertions, 5 deletions
diff --git a/src/mainboard/asus/kgpe-d16/cmos.default b/src/mainboard/asus/kgpe-d16/cmos.default
index cffdd030ee..38b2ddf40b 100644
--- a/src/mainboard/asus/kgpe-d16/cmos.default
+++ b/src/mainboard/asus/kgpe-d16/cmos.default
@@ -12,5 +12,6 @@ ecc_scrub_rate = 1.28us
 interleave_chip_selects = Enable
 interleave_nodes = Disable
 interleave_memory_channels = Enable
+ieee1394_controller = Enable
 power_on_after_fail = On
 boot_option = Fallback
diff --git a/src/mainboard/asus/kgpe-d16/cmos.layout b/src/mainboard/asus/kgpe-d16/cmos.layout
index bcf9cd3ef0..290c7c610e 100644
--- a/src/mainboard/asus/kgpe-d16/cmos.layout
+++ b/src/mainboard/asus/kgpe-d16/cmos.layout
@@ -41,6 +41,7 @@ entries
 456          1       e       1        ECC_memory
 457          1       e       1        ECC_redirection
 458          4       e       11       hypertransport_speed_limit
+477          1       e       1        ieee1394_controller
 728        256       h       0        user_data
 984         16       h       0        check_sum
 # Reserve the extended AMD configuration registers
diff --git a/src/mainboard/asus/kgpe-d16/romstage.c b/src/mainboard/asus/kgpe-d16/romstage.c
index 9964cfe01e..aa0245d41a 100644
--- a/src/mainboard/asus/kgpe-d16/romstage.c
+++ b/src/mainboard/asus/kgpe-d16/romstage.c
@@ -165,10 +165,23 @@ static void set_ddr3_voltage(uint8_t node, uint8_t index) {
 
 static void set_peripheral_control_lines(void) {
 	uint8_t byte;
-
-	/* Enable PCICLK5 (onboard FireWire device) */
-	outb(0x41, 0xcd6);
-	outb(0x02, 0xcd7);
+	uint8_t nvram;
+	uint8_t enable_ieee1394;
+
+	enable_ieee1394 = 1;
+
+	if (get_option(&nvram, "ieee1394_controller") == CB_SUCCESS)
+		enable_ieee1394 = nvram & 0x1;
+
+	if (enable_ieee1394) {
+		/* Enable PCICLK5 (onboard FireWire device) */
+		outb(0x41, 0xcd6);
+		outb(0x02, 0xcd7);
+	} else {
+		/* Disable PCICLK5 (onboard FireWire device) */
+		outb(0x41, 0xcd6);
+		outb(0x00, 0xcd7);
+	}
 
 	/* Enable the RTC AltCentury register */
 	outb(0x41, 0xcd6);
@@ -419,4 +432,4 @@ void cache_as_ram_main(unsigned long bist, unsigned long cpu_init_detectedx)
 BOOL AMD_CB_ManualBUIDSwapList (u8 node, u8 link, const u8 **List)
 {
 	return 0;
-}
-\ No newline at end of file
+}