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-rw-r--r--src/mainboard/asus/kgpe-d16/acpi_tables.c2
-rw-r--r--src/mainboard/asus/kgpe-d16/spd_notes.txt2
2 files changed, 2 insertions, 2 deletions
diff --git a/src/mainboard/asus/kgpe-d16/acpi_tables.c b/src/mainboard/asus/kgpe-d16/acpi_tables.c
index f20e837556..8395b9d460 100644
--- a/src/mainboard/asus/kgpe-d16/acpi_tables.c
+++ b/src/mainboard/asus/kgpe-d16/acpi_tables.c
@@ -106,4 +106,4 @@ unsigned long acpi_fill_ivrs_ioapic(acpi_ivrs_t* ivrs, unsigned long current)
current += 8;
return current;
-} \ No newline at end of file
+}
diff --git a/src/mainboard/asus/kgpe-d16/spd_notes.txt b/src/mainboard/asus/kgpe-d16/spd_notes.txt
index ddd5cc84d6..d944229f00 100644
--- a/src/mainboard/asus/kgpe-d16/spd_notes.txt
+++ b/src/mainboard/asus/kgpe-d16/spd_notes.txt
@@ -43,4 +43,4 @@ After that, there's a cascade of small FETs and resistors in that region, eventu
SuperIO pin 81 (VSBGATE#) enables the standby voltage rails when set LOW.
VSBGATE# is reset on every assertion of PWRGOOD.
-Setting SuperIO LDN 9 CRF4 bits 1 or 0 (or both) to 0 disables NICB. \ No newline at end of file
+Setting SuperIO LDN 9 CRF4 bits 1 or 0 (or both) to 0 disables NICB.