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Diffstat (limited to 'src/mainboard/asus/kfsn4-dre')
-rw-r--r--src/mainboard/asus/kfsn4-dre/acpi/pm_ctrl.asl2
-rw-r--r--src/mainboard/asus/kfsn4-dre/dsdt.asl2
-rw-r--r--src/mainboard/asus/kfsn4-dre/resourcemap.c2
-rw-r--r--src/mainboard/asus/kfsn4-dre/romstage.c8
4 files changed, 7 insertions, 7 deletions
diff --git a/src/mainboard/asus/kfsn4-dre/acpi/pm_ctrl.asl b/src/mainboard/asus/kfsn4-dre/acpi/pm_ctrl.asl
index 0afb841435..bde6fb628d 100644
--- a/src/mainboard/asus/kfsn4-dre/acpi/pm_ctrl.asl
+++ b/src/mainboard/asus/kfsn4-dre/acpi/pm_ctrl.asl
@@ -231,7 +231,7 @@
/* On older chips, clear PciExpWakeDisEn */
/*if (LLessEqual(\_SB.SBRI, 0x13)) {
- * Store(0,\_SB.PWDE)
+ * Store(0,\_SB.PWDE)
*}
*/
diff --git a/src/mainboard/asus/kfsn4-dre/dsdt.asl b/src/mainboard/asus/kfsn4-dre/dsdt.asl
index 2f1e86a14b..575715cf66 100644
--- a/src/mainboard/asus/kfsn4-dre/dsdt.asl
+++ b/src/mainboard/asus/kfsn4-dre/dsdt.asl
@@ -126,7 +126,7 @@ DefinitionBlock (
Notify (\_SB.PWRB, 0x02) /* NOTIFY_DEVICE_WAKE */
}
- } /* End Scope GPE */
+ } /* End Scope GPE */
/* Root of the bus hierarchy */
Scope (\_SB)
diff --git a/src/mainboard/asus/kfsn4-dre/resourcemap.c b/src/mainboard/asus/kfsn4-dre/resourcemap.c
index cfbade68f2..f4e549b17f 100644
--- a/src/mainboard/asus/kfsn4-dre/resourcemap.c
+++ b/src/mainboard/asus/kfsn4-dre/resourcemap.c
@@ -226,7 +226,7 @@ static void setup_mb_resource_map(void)
* This field defines the start of PCI I/O region n
* [31:25] Reserved
*/
-// PCI_ADDR(CONFIG_CBB, CONFIG_CDB, 1, 0xC0), 0xFE000FCC, 0x00001013,
+// PCI_ADDR(CONFIG_CBB, CONFIG_CDB, 1, 0xC0), 0xFE000FCC, 0x00001013,
PCI_ADDR(CONFIG_CBB, CONFIG_CDB, 1, 0xC8), 0xFE000FCC, 0x00000000,
PCI_ADDR(CONFIG_CBB, CONFIG_CDB, 1, 0xD0), 0xFE000FCC, 0x00000000,
PCI_ADDR(CONFIG_CBB, CONFIG_CDB, 1, 0xD8), 0xFE000FCC, 0x00000000,
diff --git a/src/mainboard/asus/kfsn4-dre/romstage.c b/src/mainboard/asus/kfsn4-dre/romstage.c
index 56a6bdffd5..2809f0fe91 100644
--- a/src/mainboard/asus/kfsn4-dre/romstage.c
+++ b/src/mainboard/asus/kfsn4-dre/romstage.c
@@ -318,8 +318,8 @@ void cache_as_ram_main(unsigned long bist, unsigned long cpu_init_detectedx)
* IS_ENABLED(CONFIG_DEBUG_SMBUS) uncomment this block
*/
if (IS_ENABLED(CONFIG_DEBUG_SMBUS)) {
- dump_spd_registers(&cpu[0]);
- dump_smbus_registers();
+ dump_spd_registers(&cpu[0]);
+ dump_smbus_registers();
}
#endif
@@ -344,8 +344,8 @@ void cache_as_ram_main(unsigned long bist, unsigned long cpu_init_detectedx)
/* Initialize GPIO */
/* Access SuperIO GPI03 logical device */
uint16_t port = GPIO3_DEV >> 8;
- outb(0x87, port);
- outb(0x87, port);
+ outb(0x87, port);
+ outb(0x87, port);
pnp_set_logical_device(GPIO3_DEV);
/* Set GP37 (power LED) to output */
pnp_write_config(GPIO3_DEV, 0xf0, 0x7f);