diff options
Diffstat (limited to 'src/mainboard/asus/f2a85-m')
| -rw-r--r-- | src/mainboard/asus/f2a85-m/acpi/gpe.asl | 8 | ||||
| -rw-r--r-- | src/mainboard/asus/f2a85-m/dsdt.asl | 7 |
2 files changed, 11 insertions, 4 deletions
diff --git a/src/mainboard/asus/f2a85-m/acpi/gpe.asl b/src/mainboard/asus/f2a85-m/acpi/gpe.asl index 956d5d1d09..a5ec91a3a6 100644 --- a/src/mainboard/asus/f2a85-m/acpi/gpe.asl +++ b/src/mainboard/asus/f2a85-m/acpi/gpe.asl @@ -22,7 +22,7 @@ Scope(\_GPE) { /* Start Scope GPE */ /* General event 3 */ Method(_L03) { /* DBGO("\\_GPE\\_L00\n") */ - Notify(\_SB.PCI0.PWRB, 0x02) /* NOTIFY_DEVICE_WAKE */ + Notify(\_SB.PWRB, 0x02) /* NOTIFY_DEVICE_WAKE */ } /* Legacy PM event */ @@ -46,7 +46,7 @@ Scope(\_GPE) { /* Start Scope GPE */ Notify(\_SB.PCI0.UOH5, 0x02) /* NOTIFY_DEVICE_WAKE */ Notify(\_SB.PCI0.UOH6, 0x02) /* NOTIFY_DEVICE_WAKE */ Notify(\_SB.PCI0.UEH1, 0x02) /* NOTIFY_DEVICE_WAKE */ - Notify(\_SB.PCI0.PWRB, 0x02) /* NOTIFY_DEVICE_WAKE */ + Notify(\_SB.PWRB, 0x02) /* NOTIFY_DEVICE_WAKE */ } /* ExtEvent0 SCI event */ @@ -64,13 +64,13 @@ Scope(\_GPE) { /* Start Scope GPE */ Method(_L18) { /* DBGO("\\_GPE\\_L18\n") */ Notify(\_SB.PCI0.PBR4, 0x02) /* NOTIFY_DEVICE_WAKE */ - Notify(\_SB.PCI0.PWRB, 0x02) /* NOTIFY_DEVICE_WAKE */ + Notify(\_SB.PWRB, 0x02) /* NOTIFY_DEVICE_WAKE */ } /* Azalia SCI event */ Method(_L1B) { /* DBGO("\\_GPE\\_L1B\n") */ Notify(\_SB.PCI0.AZHD, 0x02) /* NOTIFY_DEVICE_WAKE */ - Notify(\_SB.PCI0.PWRB, 0x02) /* NOTIFY_DEVICE_WAKE */ + Notify(\_SB.PWRB, 0x02) /* NOTIFY_DEVICE_WAKE */ } } /* End Scope GPE */ diff --git a/src/mainboard/asus/f2a85-m/dsdt.asl b/src/mainboard/asus/f2a85-m/dsdt.asl index bb9c0fe154..a1a95b2006 100644 --- a/src/mainboard/asus/f2a85-m/dsdt.asl +++ b/src/mainboard/asus/f2a85-m/dsdt.asl @@ -55,6 +55,13 @@ DefinitionBlock ( /* Describe IRQ Routing mapping for this platform (within the \_SB scope) */ #include "acpi/routing.asl" + Device(PWRB) { + Name(_HID, EISAID("PNP0C0C")) + Name(_UID, 0xAA) + Name(_PRW, Package () {3, 0x04}) + Name(_STA, 0x0B) + } + Device(PCI0) { /* Describe the AMD Northbridge */ #include <northbridge/amd/agesa/family15tn/acpi/northbridge.asl> |