diff options
Diffstat (limited to 'src/mainboard/asus/f2a85-m')
-rw-r--r-- | src/mainboard/asus/f2a85-m/romstage.c | 15 |
1 files changed, 7 insertions, 8 deletions
diff --git a/src/mainboard/asus/f2a85-m/romstage.c b/src/mainboard/asus/f2a85-m/romstage.c index 57450ee3fa..fbc89a7fa2 100644 --- a/src/mainboard/asus/f2a85-m/romstage.c +++ b/src/mainboard/asus/f2a85-m/romstage.c @@ -19,7 +19,6 @@ */ #include <northbridge/amd/agesa/agesawrapper.h> -#include <northbridge/amd/agesa/agesawrapper_call.h> #include <arch/acpi.h> #include <arch/cpu.h> @@ -76,7 +75,7 @@ void cache_as_ram_main(unsigned long bist, unsigned long cpu_init_detectedx) hudson_lpc_port80(); #endif - AGESAWRAPPER_PRE_CONSOLE(amdinitmmio); + agesawrapper_amdinitmmio(); if (!cpu_init_detectedx && boot_cpu()) { @@ -128,24 +127,24 @@ void cache_as_ram_main(unsigned long bist, unsigned long cpu_init_detectedx) printk(BIOS_DEBUG, "cpu_init_detectedx = %08lx\n", cpu_init_detectedx); post_code(0x37); - AGESAWRAPPER(amdinitreset); + agesawrapper_amdinitreset(); post_code(0x39); - AGESAWRAPPER(amdinitearly); + agesawrapper_amdinitearly(); int s3resume = acpi_is_wakeup_early() && acpi_s3_resume_allowed(); if (!s3resume) { post_code(0x40); - AGESAWRAPPER(amdinitpost); + agesawrapper_amdinitpost(); post_code(0x41); - AGESAWRAPPER(amdinitenv); + agesawrapper_amdinitenv(); disable_cache_as_ram(); } else { /* S3 detect */ printk(BIOS_INFO, "S3 detected\n"); post_code(0x60); - AGESAWRAPPER(amdinitresume); + agesawrapper_amdinitresume(); agesawrapper_amdinitcpuio(); - AGESAWRAPPER(amds3laterestore); + agesawrapper_amds3laterestore(); post_code(0x61); prepare_for_resume(); |