6 files changed, 3 insertions, 26 deletions
diff --git a/src/mainboard/asrock/b75m-itx/devicetree.cb b/src/mainboard/asrock/b75m-itx/devicetree.cb
index 5f45ffe621..6d4ca2d168 100644
--- a/src/mainboard/asrock/b75m-itx/devicetree.cb
+++ b/src/mainboard/asrock/b75m-itx/devicetree.cb
@@ -4,6 +4,7 @@ chip northbridge/intel/sandybridge
 	register "gpu_dp_b_hotplug" = "4"
 	register "gpu_dp_c_hotplug" = "4"
 	register "gpu_dp_d_hotplug" = "4"
+	register "spd_addresses" = "{0x50, 0, 0x52, 0}"
 
 	device domain 0 on
 		device pci 00.0 on
diff --git a/src/mainboard/asrock/b75m-itx/early_init.c b/src/mainboard/asrock/b75m-itx/early_init.c
index 189e24474a..b70794aeba 100644
--- a/src/mainboard/asrock/b75m-itx/early_init.c
+++ b/src/mainboard/asrock/b75m-itx/early_init.c
@@ -1,16 +1,9 @@
 /* SPDX-License-Identifier: GPL-2.0-or-later */
 
 #include <bootblock_common.h>
-#include <northbridge/intel/sandybridge/raminit_native.h>
 #include <southbridge/intel/bd82x6x/pch.h>
 
 const struct southbridge_usb_port mainboard_usb_ports[] = {
 	{1, 0, 0}, {1, 0, 0}, {1, 1, 1}, {1, 1, 1}, {1, 1, 2}, {1, 1, 2}, {1, 0, 3},
 	{1, 0, 3}, {1, 0, 4}, {1, 0, 4}, {1, 0, 6}, {1, 1, 5}, {1, 1, 5}, {1, 0, 6},
 };
-
-void mainboard_get_spd(spd_raw_data *spd, bool id_only)
-{
-	read_spd(&spd[0], 0x50, id_only);
-	read_spd(&spd[2], 0x52, id_only);
-}
diff --git a/src/mainboard/asrock/b75pro3-m/devicetree.cb b/src/mainboard/asrock/b75pro3-m/devicetree.cb
index dc6080d735..e2c898d0b8 100644
--- a/src/mainboard/asrock/b75pro3-m/devicetree.cb
+++ b/src/mainboard/asrock/b75pro3-m/devicetree.cb
@@ -13,6 +13,7 @@ chip northbridge/intel/sandybridge
 	register "gpu_panel_power_down_delay" = "0"
 	register "gpu_panel_power_up_delay" = "0"
 	register "gpu_pch_backlight" = "0x00000000"
+	register "spd_addresses" = "{0x50, 0x51, 0x52, 0x53}"
 
 	device domain 0 on
 		device ref host_bridge on
diff --git a/src/mainboard/asrock/b75pro3-m/early_init.c b/src/mainboard/asrock/b75pro3-m/early_init.c
index ed856b6b58..4052b6f22d 100644
--- a/src/mainboard/asrock/b75pro3-m/early_init.c
+++ b/src/mainboard/asrock/b75pro3-m/early_init.c
@@ -2,7 +2,6 @@
 
 #include <bootblock_common.h>
 #include <device/pnp_ops.h>
-#include <northbridge/intel/sandybridge/raminit_native.h>
 #include <southbridge/intel/bd82x6x/pch.h>
 #include <superio/nuvoton/nct6776/nct6776.h>
 #include <superio/nuvoton/common/nuvoton.h>
@@ -40,11 +39,3 @@ void bootblock_mainboard_early_init(void)
 
 	nuvoton_enable_serial(SERIAL_DEV, CONFIG_TTYS0_BASE);
 }
-
-void mainboard_get_spd(spd_raw_data *spd, bool id_only)
-{
-	read_spd(&spd[0], 0x50, id_only);
-	read_spd(&spd[1], 0x51, id_only);
-	read_spd(&spd[2], 0x52, id_only);
-	read_spd(&spd[3], 0x53, id_only);
-}
diff --git a/src/mainboard/asrock/h77pro4-m/devicetree.cb b/src/mainboard/asrock/h77pro4-m/devicetree.cb
index 42b8700783..2624c38ebe 100644
--- a/src/mainboard/asrock/h77pro4-m/devicetree.cb
+++ b/src/mainboard/asrock/h77pro4-m/devicetree.cb
@@ -1,6 +1,7 @@
 # SPDX-License-Identifier: GPL-2.0-or-later
 
 chip northbridge/intel/sandybridge
+	register "spd_addresses" = "{0x50, 0x51, 0x52, 0x53}"
 	device domain 0 on
 		device ref host_bridge on # Host bridge
 			subsystemid 0x1849 0x0100
diff --git a/src/mainboard/asrock/h77pro4-m/early_init.c b/src/mainboard/asrock/h77pro4-m/early_init.c
index 48024cba5c..4637378456 100644
--- a/src/mainboard/asrock/h77pro4-m/early_init.c
+++ b/src/mainboard/asrock/h77pro4-m/early_init.c
@@ -1,11 +1,9 @@
 /* SPDX-License-Identifier: GPL-2.0-only */
 
 #include <stdint.h>
-
 #include <bootblock_common.h>
 #include <device/pci_ops.h>
 #include <device/pnp_ops.h>
-#include <northbridge/intel/sandybridge/raminit_native.h>
 #include <option.h>
 #include <southbridge/intel/bd82x6x/pch.h>
 #include <superio/nuvoton/common/nuvoton.h>
@@ -87,11 +85,3 @@ void bootblock_mainboard_early_init(void)
 	/* Enable UART */
 	nuvoton_enable_serial(SERIAL_DEV, CONFIG_TTYS0_BASE);
 }
-
-void mainboard_get_spd(spd_raw_data *spd, bool id_only)
-{
-	read_spd(&spd[0], 0x50, id_only);
-	read_spd(&spd[1], 0x51, id_only);
-	read_spd(&spd[2], 0x52, id_only);
-	read_spd(&spd[3], 0x53, id_only);
-}