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-rw-r--r--src/mainboard/asrock/939a785gmh/romstage.c11
1 files changed, 11 insertions, 0 deletions
diff --git a/src/mainboard/asrock/939a785gmh/romstage.c b/src/mainboard/asrock/939a785gmh/romstage.c
index 76c4414b75..2ee4e4ddbd 100644
--- a/src/mainboard/asrock/939a785gmh/romstage.c
+++ b/src/mainboard/asrock/939a785gmh/romstage.c
@@ -53,6 +53,11 @@
#include "northbridge/amd/amdk8/reset_test.c"
#include "superio/winbond/w83627dhg/w83627dhg_early_serial.c"
+#if CONFIG_USBDEBUG
+#include "southbridge/amd/sb700/sb700_enable_usbdebug.c"
+#include "pc80/usbdebug_serial.c"
+#endif
+
#include "cpu/x86/mtrr/earlymtrr.c"
#include "cpu/x86/bist.h"
@@ -176,6 +181,12 @@ void cache_as_ram_main(unsigned long bist, unsigned long cpu_init_detectedx)
sio_init();
w83627dhg_enable_serial(SERIAL_DEV, CONFIG_TTYS0_BASE);
uart_init();
+
+#if CONFIG_USBDEBUG
+ sb700_enable_usbdebug(0);
+ early_usbdebug_init();
+#endif
+
console_init();
/* Halt if there was a built in self test failure */