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-rw-r--r--src/mainboard/asrock/e350m1/romstage.c2
-rw-r--r--src/mainboard/asrock/imb-a180/romstage.c4
2 files changed, 3 insertions, 3 deletions
diff --git a/src/mainboard/asrock/e350m1/romstage.c b/src/mainboard/asrock/e350m1/romstage.c
index ea59a8d805..911e821664 100644
--- a/src/mainboard/asrock/e350m1/romstage.c
+++ b/src/mainboard/asrock/e350m1/romstage.c
@@ -55,7 +55,7 @@ void cache_as_ram_main(unsigned long bist, unsigned long cpu_init_detectedx)
/* All cores: set pstate 0 (1600 MHz) early to save a few ms of boot time */
__writemsr(0xc0010062, 0);
- agesawrapper_amdinitmmio();
+ amd_initmmio();
if (!cpu_init_detectedx && boot_cpu()) {
post_code(0x30);
diff --git a/src/mainboard/asrock/imb-a180/romstage.c b/src/mainboard/asrock/imb-a180/romstage.c
index 3d1458bed1..1ba1104eb0 100644
--- a/src/mainboard/asrock/imb-a180/romstage.c
+++ b/src/mainboard/asrock/imb-a180/romstage.c
@@ -55,7 +55,7 @@ void cache_as_ram_main(unsigned long bist, unsigned long cpu_init_detectedx)
//outb(0xD2, 0xcd6);
//outb(0x00, 0xcd7);
- agesawrapper_amdinitmmio();
+ amd_initmmio();
/* Set LPC decode enables. */
pci_devfn_t dev = PCI_DEV(0, 0x14, 3);
@@ -125,7 +125,7 @@ void cache_as_ram_main(unsigned long bist, unsigned long cpu_init_detectedx)
post_code(0x60);
agesawrapper_amdinitresume();
- agesawrapper_amdinitcpuio();
+ amd_initcpuio();
agesawrapper_amds3laterestore();
post_code(0x61);