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path: root/src/mainboard/asrock/imb-a180/bootblock.c
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Diffstat (limited to 'src/mainboard/asrock/imb-a180/bootblock.c')
-rw-r--r--src/mainboard/asrock/imb-a180/bootblock.c24
1 files changed, 0 insertions, 24 deletions
diff --git a/src/mainboard/asrock/imb-a180/bootblock.c b/src/mainboard/asrock/imb-a180/bootblock.c
deleted file mode 100644
index 9326330258..0000000000
--- a/src/mainboard/asrock/imb-a180/bootblock.c
+++ /dev/null
@@ -1,24 +0,0 @@
-/* SPDX-License-Identifier: GPL-2.0-only */
-
-#include <amdblocks/acpimmio.h>
-#include <bootblock_common.h>
-#include <device/pnp_type.h>
-#include <superio/winbond/common/winbond.h>
-#include <superio/winbond/w83627uhg/w83627uhg.h>
-
-#define SERIAL_DEV PNP_DEV(0x2e, W83627UHG_SP1)
-
-void bootblock_mainboard_early_init(void)
-{
- /* Disable PCI-PCI bridge and release GPIO32/33 for other uses. */
- pm_write8(0xea, 0x1);
-
- /* Set auxiliary output clock frequency on OSCOUT1 pin to be 48MHz */
- misc_write32(0x28, misc_read32(0x28) & 0xfff8ffff);
-
- /* Enable Auxiliary Clock1, disable FCH 14 MHz OscClk */
- misc_write32(0x40, misc_read32(0x40) & 0xffffbffb);
-
- /* w83627uhg has a default clk of 48MHz, p.9 of data-sheet */
- winbond_enable_serial(SERIAL_DEV, CONFIG_TTYS0_BASE);
-}