summaryrefslogtreecommitdiff
path: root/src/mainboard/asrock/e350m1/devicetree.cb
diff options
context:
space:
mode:
Diffstat (limited to 'src/mainboard/asrock/e350m1/devicetree.cb')
-rw-r--r--src/mainboard/asrock/e350m1/devicetree.cb14
1 files changed, 11 insertions, 3 deletions
diff --git a/src/mainboard/asrock/e350m1/devicetree.cb b/src/mainboard/asrock/e350m1/devicetree.cb
index d1e4a8b0c8..bc3bd18311 100644
--- a/src/mainboard/asrock/e350m1/devicetree.cb
+++ b/src/mainboard/asrock/e350m1/devicetree.cb
@@ -99,11 +99,19 @@ chip northbridge/amd/agesa_wrapper/family14/root_complex
end #LPC
device pci 14.4 on end # PCI 0x4384
device pci 14.5 on end # USB 2
- device pci 15.0 off end # PCIe PortA
- device pci 15.1 off end # PCIe PortB
+ device pci 15.0 on end # PCIe PortA
+ device pci 15.1 on end # PCIe PortB
device pci 15.2 off end # PCIe PortC
device pci 15.3 off end # PCIe PortD
- register "gpp_configuration" = "0" #4:0:0:0 (really need to disable all 4 somehow)
+
+ # gpp_configuration options
+ #0000: PortA lanes[3:0]
+ #0001: N/A
+ #0010: PortA lanes[1:0], PortB lanes[3:2]
+ #0011: PortA lanes[1:0], PortB lane2, PortC lane3
+ #0100: PortA lane0, PortB lane1, PortC lane2, PortD lane3.
+ register "gpp_configuration" = "4"
+
register "boot_switch_sata_ide" = "0" # 0: boot from SATA. 1: IDE
end #southbridge/amd/cimx_wrapper/sb800
# end # device pci 18.0