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-rw-r--r--src/mainboard/asrock/b85m_pro4/devicetree.cb1
-rw-r--r--src/mainboard/asrock/b85m_pro4/romstage.c9
2 files changed, 1 insertions, 9 deletions
diff --git a/src/mainboard/asrock/b85m_pro4/devicetree.cb b/src/mainboard/asrock/b85m_pro4/devicetree.cb
index e9a987651c..4cd3b3c3ed 100644
--- a/src/mainboard/asrock/b85m_pro4/devicetree.cb
+++ b/src/mainboard/asrock/b85m_pro4/devicetree.cb
@@ -3,6 +3,7 @@ chip northbridge/intel/haswell
# This mainboard has VGA
register "gpu_ddi_e_connected" = "1"
+ register "spd_addresses" = "{0x50, 0x51, 0x52, 0x53}"
chip cpu/intel/haswell
device cpu_cluster 0 on ops haswell_cpu_bus_ops end
end
diff --git a/src/mainboard/asrock/b85m_pro4/romstage.c b/src/mainboard/asrock/b85m_pro4/romstage.c
index 25b157d8a3..1c85a299bc 100644
--- a/src/mainboard/asrock/b85m_pro4/romstage.c
+++ b/src/mainboard/asrock/b85m_pro4/romstage.c
@@ -1,7 +1,6 @@
/* SPDX-License-Identifier: GPL-2.0-only */
#include <northbridge/intel/haswell/haswell.h>
-#include <northbridge/intel/haswell/raminit.h>
#include <southbridge/intel/lynxpoint/pch.h>
void mainboard_config_rcba(void)
@@ -16,14 +15,6 @@ void mainboard_config_rcba(void)
RCBA16(D20IR) = DIR_ROUTE(PIRQA, PIRQB, PIRQC, PIRQD);
}
-void mb_get_spd_map(struct spd_info *spdi)
-{
- spdi->addresses[0] = 0x50;
- spdi->addresses[1] = 0x51;
- spdi->addresses[2] = 0x52;
- spdi->addresses[3] = 0x53;
-}
-
const struct usb2_port_config mainboard_usb2_ports[MAX_USB2_PORTS] = {
/* Length, Enable, OCn#, Location */
{ 0x0040, 1, 0, USB_PORT_BACK_PANEL },