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-rw-r--r--src/mainboard/asrock/939a785gmh/get_bus_conf.c2
-rw-r--r--src/mainboard/asrock/939a785gmh/mainboard.c8
2 files changed, 2 insertions, 8 deletions
diff --git a/src/mainboard/asrock/939a785gmh/get_bus_conf.c b/src/mainboard/asrock/939a785gmh/get_bus_conf.c
index e3c7acd226..43558ac984 100644
--- a/src/mainboard/asrock/939a785gmh/get_bus_conf.c
+++ b/src/mainboard/asrock/939a785gmh/get_bus_conf.c
@@ -63,8 +63,6 @@ u32 sbdn_sb700;
static u32 get_bus_conf_done = 0;
-void get_bus_conf(void);
-
void get_bus_conf(void)
{
u32 apicid_base;
diff --git a/src/mainboard/asrock/939a785gmh/mainboard.c b/src/mainboard/asrock/939a785gmh/mainboard.c
index 44752f1e91..0aea2c65ea 100644
--- a/src/mainboard/asrock/939a785gmh/mainboard.c
+++ b/src/mainboard/asrock/939a785gmh/mainboard.c
@@ -21,19 +21,15 @@
#include <device/device.h>
#include <device/pci.h>
#include <arch/io.h>
-#include <boot/coreboot_tables.h>
+#include <boot/tables.h>
#include <cpu/x86/msr.h>
#include <cpu/amd/mtrr.h>
#include <device/pci_def.h>
-#include <arch/coreboot_tables.h>
-#include <../southbridge/amd/sb700/sb700.h>
+#include <southbridge/amd/sb700/sb700.h>
#include "chip.h"
#define SMBUS_IO_BASE 0x6000
-extern void lb_add_memory_range(struct lb_memory *mem, uint32_t type,
- uint64_t start, uint64_t size);
-
uint64_t uma_memory_base, uma_memory_size;
void set_pcie_dereset(void);