diff options
Diffstat (limited to 'src/mainboard/artecgroup/dbe61/romstage.c')
| -rw-r--r-- | src/mainboard/artecgroup/dbe61/romstage.c | 4 |
1 files changed, 1 insertions, 3 deletions
diff --git a/src/mainboard/artecgroup/dbe61/romstage.c b/src/mainboard/artecgroup/dbe61/romstage.c index 2172338685..2fb86f1dac 100644 --- a/src/mainboard/artecgroup/dbe61/romstage.c +++ b/src/mainboard/artecgroup/dbe61/romstage.c @@ -35,8 +35,6 @@ #include "southbridge/amd/cs5536/cs5536.h" #include "spd_table.h" -#define POST_CODE(x) outb(x, 0x80) - #include "southbridge/amd/cs5536/cs5536_early_smbus.c" #include "southbridge/amd/cs5536/cs5536_early_setup.c" @@ -112,7 +110,7 @@ static void mb_gpio_init(void) void cache_as_ram_main(void) { - POST_CODE(0x01); + post_code(0x01); static const struct mem_controller memctrl[] = { {.channel0 = {(0xa << 3) | 0, (0xa << 3) | 1}} |