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-rw-r--r--src/mainboard/amd/bimini_fam10/romstage.c3
-rw-r--r--src/mainboard/amd/mahogany_fam10/romstage.c3
-rw-r--r--src/mainboard/amd/serengeti_cheetah_fam10/romstage.c3
-rw-r--r--src/mainboard/amd/tilapia_fam10/romstage.c3
4 files changed, 4 insertions, 8 deletions
diff --git a/src/mainboard/amd/bimini_fam10/romstage.c b/src/mainboard/amd/bimini_fam10/romstage.c
index e9d391cb0a..e2142f2791 100644
--- a/src/mainboard/amd/bimini_fam10/romstage.c
+++ b/src/mainboard/amd/bimini_fam10/romstage.c
@@ -42,7 +42,6 @@
#include "cpu/amd/quadcore/quadcore.c"
int spd_read_byte(unsigned int device, unsigned int address);
-extern struct sys_info sysinfo_car;
int spd_read_byte(u32 device, u32 address)
@@ -52,7 +51,7 @@ int spd_read_byte(u32 device, u32 address)
void cache_as_ram_main(unsigned long bist, unsigned long cpu_init_detectedx)
{
- struct sys_info *sysinfo = &sysinfo_car;
+ struct sys_info *sysinfo = get_sysinfo();
static const u8 spd_addr[] = {RC00, DIMM0, DIMM2, 0, 0, DIMM1, DIMM3, 0, 0, };
u32 bsp_apicid = 0, val;
msr_t msr;
diff --git a/src/mainboard/amd/mahogany_fam10/romstage.c b/src/mainboard/amd/mahogany_fam10/romstage.c
index 2376414206..3397d26d96 100644
--- a/src/mainboard/amd/mahogany_fam10/romstage.c
+++ b/src/mainboard/amd/mahogany_fam10/romstage.c
@@ -46,7 +46,6 @@
#include "cpu/amd/quadcore/quadcore.c"
int spd_read_byte(unsigned int device, unsigned int address);
-extern struct sys_info sysinfo_car;
int spd_read_byte(u32 device, u32 address)
@@ -57,7 +56,7 @@ int spd_read_byte(u32 device, u32 address)
void cache_as_ram_main(unsigned long bist, unsigned long cpu_init_detectedx)
{
- struct sys_info *sysinfo = &sysinfo_car;
+ struct sys_info *sysinfo = get_sysinfo();
static const u8 spd_addr[] = {RC00, DIMM0, DIMM2, 0, 0, DIMM1, DIMM3, 0, 0, };
u32 bsp_apicid = 0, val;
msr_t msr;
diff --git a/src/mainboard/amd/serengeti_cheetah_fam10/romstage.c b/src/mainboard/amd/serengeti_cheetah_fam10/romstage.c
index 1ba65427c2..3871c592d5 100644
--- a/src/mainboard/amd/serengeti_cheetah_fam10/romstage.c
+++ b/src/mainboard/amd/serengeti_cheetah_fam10/romstage.c
@@ -42,7 +42,6 @@
#define SERIAL_DEV PNP_DEV(0x2e, W83627HF_SP1)
int spd_read_byte(unsigned int device, unsigned int address);
-extern struct sys_info sysinfo_car;
static void memreset_setup(void)
{
@@ -167,7 +166,7 @@ static const u8 spd_addr[] = {
void cache_as_ram_main(unsigned long bist, unsigned long cpu_init_detectedx)
{
- struct sys_info *sysinfo = &sysinfo_car;
+ struct sys_info *sysinfo = get_sysinfo();
u32 bsp_apicid = 0, val;
msr_t msr;
diff --git a/src/mainboard/amd/tilapia_fam10/romstage.c b/src/mainboard/amd/tilapia_fam10/romstage.c
index 9aa59b285a..702e9db9df 100644
--- a/src/mainboard/amd/tilapia_fam10/romstage.c
+++ b/src/mainboard/amd/tilapia_fam10/romstage.c
@@ -44,7 +44,6 @@
#define SERIAL_DEV PNP_DEV(0x2e, IT8718F_SP1)
int spd_read_byte(unsigned int device, unsigned int address);
-extern struct sys_info sysinfo_car;
int spd_read_byte(u32 device, u32 address)
@@ -55,7 +54,7 @@ int spd_read_byte(u32 device, u32 address)
void cache_as_ram_main(unsigned long bist, unsigned long cpu_init_detectedx)
{
- struct sys_info *sysinfo = &sysinfo_car;
+ struct sys_info *sysinfo = get_sysinfo();
static const u8 spd_addr[] = {RC00, DIMM0, DIMM2, 0, 0, DIMM1, DIMM3, 0, 0, };
u32 bsp_apicid = 0, val;
msr_t msr;