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-rw-r--r--src/mainboard/amd/serengeti_cheetah_fam10/Options.lb9
1 files changed, 5 insertions, 4 deletions
diff --git a/src/mainboard/amd/serengeti_cheetah_fam10/Options.lb b/src/mainboard/amd/serengeti_cheetah_fam10/Options.lb
index 8bf43bb656..80dff3a67a 100644
--- a/src/mainboard/amd/serengeti_cheetah_fam10/Options.lb
+++ b/src/mainboard/amd/serengeti_cheetah_fam10/Options.lb
@@ -261,11 +261,12 @@ default MAINBOARD_PCI_SUBSYSTEM_DEVICE_ID=0x2b80
##
## Set microcode patch file name
##
-## Barcelona rev Ax: "mc_patch_01000020.h"
-## Barcelona rev B0, B1, BA: "mc_patch_01000084.h"
-## Barcelona rev B2, B3: "mc_patch_01000083.h"
+## Barcelona rev DR-Ax: "mc_patch_01000020.h"
+## Barcelona rev DR-B0, B1, BA: "mc_patch_01000096.h"
+## Barcelona rev DR-B2, B3: "mc_patch_01000095.h"
+## Shanghai rev DA-C2: "mc_patch_0100009f.h"
##
-default AMD_UCODE_PATCH_FILE="mc_patch_01000083.h"
+default AMD_UCODE_PATCH_FILE="mc_patch_01000095.h"
###
### coreboot layout values