diff options
Diffstat (limited to 'src/mainboard/amd')
-rw-r--r-- | src/mainboard/amd/dinar/romstage.c | 5 | ||||
-rw-r--r-- | src/mainboard/amd/inagua/romstage.c | 5 | ||||
-rw-r--r-- | src/mainboard/amd/persimmon/romstage.c | 5 | ||||
-rw-r--r-- | src/mainboard/amd/south_station/romstage.c | 5 | ||||
-rw-r--r-- | src/mainboard/amd/union_station/romstage.c | 5 |
5 files changed, 10 insertions, 15 deletions
diff --git a/src/mainboard/amd/dinar/romstage.c b/src/mainboard/amd/dinar/romstage.c index b1e9a61ec2..c011038c7e 100644 --- a/src/mainboard/amd/dinar/romstage.c +++ b/src/mainboard/amd/dinar/romstage.c @@ -43,6 +43,8 @@ void cache_as_ram_main(unsigned long bist, unsigned long cpu_init_detectedx) { u32 val; + agesawrapper_amdinitmmio(); + if (!cpu_init_detectedx && boot_cpu()) { post_code(0x30); @@ -62,9 +64,6 @@ void cache_as_ram_main(unsigned long bist, unsigned long cpu_init_detectedx) } - post_code(0x32); - agesawrapper_amdinitmmio(); - /* Halt if there was a built in self test failure */ post_code(0x33); report_bist_failure(bist); diff --git a/src/mainboard/amd/inagua/romstage.c b/src/mainboard/amd/inagua/romstage.c index 3a5c761530..68822e0d33 100644 --- a/src/mainboard/amd/inagua/romstage.c +++ b/src/mainboard/amd/inagua/romstage.c @@ -54,6 +54,8 @@ void cache_as_ram_main(unsigned long bist, unsigned long cpu_init_detectedx) */ __writemsr (0xc0010062, 0); + agesawrapper_amdinitmmio(); + if (!cpu_init_detectedx && boot_cpu()) { post_code(0x30); sb_Poweron_Init(); @@ -73,9 +75,6 @@ void cache_as_ram_main(unsigned long bist, unsigned long cpu_init_detectedx) printk(BIOS_DEBUG, "BSP Family_Model: %08x\n", val); printk(BIOS_DEBUG, "cpu_init_detectedx = %08lx\n", cpu_init_detectedx); - post_code(0x35); - agesawrapper_amdinitmmio(); - post_code(0x37); agesawrapper_amdinitreset(); diff --git a/src/mainboard/amd/persimmon/romstage.c b/src/mainboard/amd/persimmon/romstage.c index 5434ed3fe2..b0c1624780 100644 --- a/src/mainboard/amd/persimmon/romstage.c +++ b/src/mainboard/amd/persimmon/romstage.c @@ -60,6 +60,8 @@ void cache_as_ram_main(unsigned long bist, unsigned long cpu_init_detectedx) /* All cores: set pstate 0 (1600 MHz) early to save a few ms of boot time */ __writemsr (0xc0010062, 0); + agesawrapper_amdinitmmio(); + if (!cpu_init_detectedx && boot_cpu()) { post_code(0x30); sb_Poweron_Init(); @@ -78,9 +80,6 @@ void cache_as_ram_main(unsigned long bist, unsigned long cpu_init_detectedx) printk(BIOS_DEBUG, "BSP Family_Model: %08x\n", val); printk(BIOS_DEBUG, "cpu_init_detectedx = %08lx\n", cpu_init_detectedx); - post_code(0x35); - agesawrapper_amdinitmmio(); - post_code(0x37); agesawrapper_amdinitreset(); diff --git a/src/mainboard/amd/south_station/romstage.c b/src/mainboard/amd/south_station/romstage.c index 7dcd9b206c..727b92d7aa 100644 --- a/src/mainboard/amd/south_station/romstage.c +++ b/src/mainboard/amd/south_station/romstage.c @@ -55,6 +55,8 @@ void cache_as_ram_main(unsigned long bist, unsigned long cpu_init_detectedx) /* All cores: set pstate 0 (1600 MHz) early to save a few ms of boot time */ __writemsr (0xc0010062, 0); + agesawrapper_amdinitmmio(); + if (!cpu_init_detectedx && boot_cpu()) { post_code(0x30); sb_Poweron_Init(); @@ -73,9 +75,6 @@ void cache_as_ram_main(unsigned long bist, unsigned long cpu_init_detectedx) printk(BIOS_DEBUG, "BSP Family_Model: %08x\n", val); printk(BIOS_DEBUG, "cpu_init_detectedx = %08lx\n", cpu_init_detectedx); - post_code(0x35); - agesawrapper_amdinitmmio(); - post_code(0x37); agesawrapper_amdinitreset(); diff --git a/src/mainboard/amd/union_station/romstage.c b/src/mainboard/amd/union_station/romstage.c index ac583dd33d..4d31d2baf1 100644 --- a/src/mainboard/amd/union_station/romstage.c +++ b/src/mainboard/amd/union_station/romstage.c @@ -50,6 +50,8 @@ void cache_as_ram_main(unsigned long bist, unsigned long cpu_init_detectedx) __writemsr (0x20c, (0x0100000000ull - CACHE_ROM_SIZE) | 5); __writemsr (0x20d, (0x1000000000ull - CACHE_ROM_SIZE) | 0x800); + agesawrapper_amdinitmmio(); + if (!cpu_init_detectedx && boot_cpu()) { post_code(0x30); sb_Poweron_Init(); @@ -67,9 +69,6 @@ void cache_as_ram_main(unsigned long bist, unsigned long cpu_init_detectedx) printk(BIOS_DEBUG, "BSP Family_Model: %08x\n", val); printk(BIOS_DEBUG, "cpu_init_detectedx = %08lx\n", cpu_init_detectedx); - post_code(0x35); - agesawrapper_amdinitmmio(); - post_code(0x37); agesawrapper_amdinitreset(); |