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-rw-r--r--src/mainboard/amd/dinar/agesawrapper.c2
-rw-r--r--src/mainboard/amd/parmer/agesawrapper.c2
-rw-r--r--src/mainboard/amd/thatcher/agesawrapper.c2
-rw-r--r--src/mainboard/amd/torpedo/agesawrapper.c2
4 files changed, 4 insertions, 4 deletions
diff --git a/src/mainboard/amd/dinar/agesawrapper.c b/src/mainboard/amd/dinar/agesawrapper.c
index e2b6038561..e738cba82c 100644
--- a/src/mainboard/amd/dinar/agesawrapper.c
+++ b/src/mainboard/amd/dinar/agesawrapper.c
@@ -270,7 +270,7 @@ agesawrapper_amdinitmmio (
/* Set ROM cache onto WP to decrease post time */
MsrReg = (0x0100000000 - CONFIG_ROM_SIZE) | 5;
LibAmdMsrWrite (0x20E, &MsrReg, &StdHeader);
- MsrReg = ((1UL << CONFIG_CPU_ADDR_BITS) - CONFIG_ROM_SIZE) | 0x800;
+ MsrReg = ((1ULL << CONFIG_CPU_ADDR_BITS) - CONFIG_ROM_SIZE) | 0x800ull;
LibAmdMsrWrite (0x20F, &MsrReg, &StdHeader);
Status = AGESA_SUCCESS;
diff --git a/src/mainboard/amd/parmer/agesawrapper.c b/src/mainboard/amd/parmer/agesawrapper.c
index 720de4389b..c9315fe4cf 100644
--- a/src/mainboard/amd/parmer/agesawrapper.c
+++ b/src/mainboard/amd/parmer/agesawrapper.c
@@ -166,7 +166,7 @@ agesawrapper_amdinitmmio (
/* Set ROM cache onto WP to decrease post time */
MsrReg = (0x0100000000ull - CONFIG_ROM_SIZE) | 5ull;
LibAmdMsrWrite (0x20C, &MsrReg, &StdHeader);
- MsrReg = ((1UL << CONFIG_CPU_ADDR_BITS) - CONFIG_ROM_SIZE) | 0x800ull;
+ MsrReg = ((1ULL << CONFIG_CPU_ADDR_BITS) - CONFIG_ROM_SIZE) | 0x800ull;
LibAmdMsrWrite (0x20D, &MsrReg, &StdHeader);
Status = AGESA_SUCCESS;
diff --git a/src/mainboard/amd/thatcher/agesawrapper.c b/src/mainboard/amd/thatcher/agesawrapper.c
index 7a3616b480..aaff34b2ca 100644
--- a/src/mainboard/amd/thatcher/agesawrapper.c
+++ b/src/mainboard/amd/thatcher/agesawrapper.c
@@ -166,7 +166,7 @@ agesawrapper_amdinitmmio (
/* Set ROM cache onto WP to decrease post time */
MsrReg = (0x0100000000ull - CONFIG_ROM_SIZE) | 5ull;
LibAmdMsrWrite (0x20C, &MsrReg, &StdHeader);
- MsrReg = ((1UL << CONFIG_CPU_ADDR_BITS) - CONFIG_ROM_SIZE) | 0x800ull;
+ MsrReg = ((1ULL << CONFIG_CPU_ADDR_BITS) - CONFIG_ROM_SIZE) | 0x800ull;
LibAmdMsrWrite (0x20D, &MsrReg, &StdHeader);
Status = AGESA_SUCCESS;
diff --git a/src/mainboard/amd/torpedo/agesawrapper.c b/src/mainboard/amd/torpedo/agesawrapper.c
index 2c7b092d2c..97fdbb3b6b 100644
--- a/src/mainboard/amd/torpedo/agesawrapper.c
+++ b/src/mainboard/amd/torpedo/agesawrapper.c
@@ -281,7 +281,7 @@ agesawrapper_amdinitmmio (
/* Set ROM cache onto WP to decrease post time */
MsrReg = (0x0100000000ull - CONFIG_ROM_SIZE) | 5ull;
LibAmdMsrWrite (0x20C, &MsrReg, &StdHeader);
- MsrReg = ((1UL << CONFIG_CPU_ADDR_BITS) - CONFIG_ROM_SIZE) | 0x800ull;
+ MsrReg = ((1ULL << CONFIG_CPU_ADDR_BITS) - CONFIG_ROM_SIZE) | 0x800ull;
LibAmdMsrWrite (0x20D, &MsrReg, &StdHeader);
/* Clear all pending SMI. On S3 clear power button enable so it wll not generate an SMI */