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-rw-r--r--src/mainboard/amd/olivehill/mainboard.c10
-rw-r--r--src/mainboard/amd/parmer/mainboard.c10
-rw-r--r--src/mainboard/amd/persimmon/mainboard.c8
-rw-r--r--src/mainboard/amd/thatcher/mainboard.c10
4 files changed, 5 insertions, 33 deletions
diff --git a/src/mainboard/amd/olivehill/mainboard.c b/src/mainboard/amd/olivehill/mainboard.c
index 3913898b53..cc6d9f8519 100644
--- a/src/mainboard/amd/olivehill/mainboard.c
+++ b/src/mainboard/amd/olivehill/mainboard.c
@@ -35,15 +35,9 @@
static void mainboard_enable(device_t dev)
{
printk(BIOS_INFO, "Mainboard " CONFIG_MAINBOARD_PART_NUMBER " Enable.\n");
- /*
- * The mainboard is the first place that we get control in ramstage. Check
- * for S3 resume and call the appropriate AGESA/CIMx resume functions.
- */
-#if CONFIG_HAVE_ACPI_RESUME
- acpi_slp_type = acpi_get_sleep_type();
- if (acpi_slp_type == 3)
+
+ if (acpi_is_wakeup_s3())
agesawrapper_fchs3earlyrestore();
-#endif
}
struct chip_operations mainboard_ops = {
diff --git a/src/mainboard/amd/parmer/mainboard.c b/src/mainboard/amd/parmer/mainboard.c
index 8aa76ffb0e..214cb21368 100644
--- a/src/mainboard/amd/parmer/mainboard.c
+++ b/src/mainboard/amd/parmer/mainboard.c
@@ -35,15 +35,9 @@
static void mainboard_enable(device_t dev)
{
printk(BIOS_INFO, "Mainboard " CONFIG_MAINBOARD_PART_NUMBER " Enable.\n");
- /*
- * The mainboard is the first place that we get control in ramstage. Check
- * for S3 resume and call the appropriate AGESA/CIMx resume functions.
- */
-#if CONFIG_HAVE_ACPI_RESUME
- acpi_slp_type = acpi_get_sleep_type();
- if (acpi_slp_type == 3)
+
+ if (acpi_is_wakeup_s3())
agesawrapper_fchs3earlyrestore();
-#endif
}
struct chip_operations mainboard_ops = {
diff --git a/src/mainboard/amd/persimmon/mainboard.c b/src/mainboard/amd/persimmon/mainboard.c
index db0dbe0ead..d3c5b8fec6 100644
--- a/src/mainboard/amd/persimmon/mainboard.c
+++ b/src/mainboard/amd/persimmon/mainboard.c
@@ -155,14 +155,6 @@ static void mainboard_enable(device_t dev)
{
printk(BIOS_INFO, "Mainboard " CONFIG_MAINBOARD_PART_NUMBER " Enable.\n");
-/*
- * The mainboard is the first place that we get control in ramstage. Check
- * for S3 resume and call the appropriate AGESA/CIMx resume functions.
- */
-#if CONFIG_HAVE_ACPI_RESUME
- acpi_slp_type = acpi_get_sleep_type();
-#endif
-
/* enable GPP CLK0 thru CLK1 */
/* disable GPP CLK2 thru SLT_GFX_CLK */
u8 *misc_mem_clk_cntrl = (u8 *)(ACPI_MMIO_BASE + MISC_BASE);
diff --git a/src/mainboard/amd/thatcher/mainboard.c b/src/mainboard/amd/thatcher/mainboard.c
index bfb664f4b3..2eacf76ef8 100644
--- a/src/mainboard/amd/thatcher/mainboard.c
+++ b/src/mainboard/amd/thatcher/mainboard.c
@@ -51,16 +51,8 @@ static void mainboard_enable(device_t dev)
msr.lo &= ~(1 << 23);
wrmsr(0xC0011023, msr);
- /*
- * The mainboard is the first place that we get control in ramstage. Check
- * for S3 resume and call the appropriate AGESA/CIMx resume functions.
- */
-#if CONFIG_HAVE_ACPI_RESUME
- acpi_slp_type = acpi_get_sleep_type();
- if (acpi_slp_type == 3)
+ if (acpi_is_wakeup_s3())
agesawrapper_fchs3earlyrestore();
-
-#endif
}
struct chip_operations mainboard_ops = {