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-rw-r--r--src/mainboard/amd/persimmon/romstage.c3
-rw-r--r--src/mainboard/amd/south_station/romstage.c3
2 files changed, 4 insertions, 2 deletions
diff --git a/src/mainboard/amd/persimmon/romstage.c b/src/mainboard/amd/persimmon/romstage.c
index e082f60195..81804a93ff 100644
--- a/src/mainboard/amd/persimmon/romstage.c
+++ b/src/mainboard/amd/persimmon/romstage.c
@@ -31,6 +31,7 @@
#include <cpu/x86/mtrr.h>
#include "agesawrapper.h"
#include "cpu/x86/bist.h"
+#include <superio/fintek/common/fintek.h>
#include <superio/fintek/f81865f/f81865f.h>
#include "cpu/x86/lapic.h"
#include "drivers/pc80/i8254.c"
@@ -70,7 +71,7 @@ void cache_as_ram_main(unsigned long bist, unsigned long cpu_init_detectedx)
sb_Poweron_Init();
post_code(0x31);
- f81865f_enable_serial(SERIAL_DEV, CONFIG_TTYS0_BASE);
+ fintek_enable_serial(SERIAL_DEV, CONFIG_TTYS0_BASE);
console_init();
}
diff --git a/src/mainboard/amd/south_station/romstage.c b/src/mainboard/amd/south_station/romstage.c
index 5614f88b57..5e70ecc8ed 100644
--- a/src/mainboard/amd/south_station/romstage.c
+++ b/src/mainboard/amd/south_station/romstage.c
@@ -32,6 +32,7 @@
#include <cpu/x86/mtrr.h>
#include "agesawrapper.h"
#include "cpu/x86/bist.h"
+#include <superio/fintek/common/fintek.h>
#include <superio/fintek/f81865f/f81865f.h>
#include "cpu/x86/lapic.h"
#include <sb_cimx.h>
@@ -58,7 +59,7 @@ void cache_as_ram_main(unsigned long bist, unsigned long cpu_init_detectedx)
sb_Poweron_Init();
post_code(0x31);
- f81865f_enable_serial(SERIAL_DEV, CONFIG_TTYS0_BASE);
+ fintek_enable_serial(SERIAL_DEV, CONFIG_TTYS0_BASE);
console_init();
}