diff options
Diffstat (limited to 'src/mainboard/amd')
-rw-r--r-- | src/mainboard/amd/inagua/mainboard.c | 19 | ||||
-rw-r--r-- | src/mainboard/amd/persimmon/mainboard.c | 20 | ||||
-rw-r--r-- | src/mainboard/amd/south_station/mainboard.c | 20 | ||||
-rw-r--r-- | src/mainboard/amd/torpedo/mainboard.c | 19 | ||||
-rw-r--r-- | src/mainboard/amd/union_station/mainboard.c | 20 |
5 files changed, 3 insertions, 95 deletions
diff --git a/src/mainboard/amd/inagua/mainboard.c b/src/mainboard/amd/inagua/mainboard.c index f58c7d176d..8bc70be523 100644 --- a/src/mainboard/amd/inagua/mainboard.c +++ b/src/mainboard/amd/inagua/mainboard.c @@ -20,21 +20,8 @@ #include "SBPLATFORM.h" /* Platfrom Specific Definitions */ void broadcom_init(void); -void set_pcie_reset(void); -void set_pcie_dereset(void); -/** - * TODO - * SB CIMx callback - */ -void set_pcie_reset(void) -{ -} - -/** - * mainboard specific SB CIMx callback - */ -void set_pcie_dereset(void) +static void init_gpios(void) { /** * GPIO32 Pcie Device DeAssert for APU @@ -48,7 +35,7 @@ void set_pcie_dereset(void) */ /* Multi-function pins switch to GPIO0-35, these pins are shared with - * PCI pins, make sure Husson PCI device is disabled. + * PCI pins, make sure Hudson PCI device is disabled. */ RWMEM(ACPI_MMIO_BASE + PMIO_BASE + SB_PMIOA_REGEA, AccWidthUint8, ~BIT0, 1); @@ -71,7 +58,7 @@ static void mainboard_enable(device_t dev) printk(BIOS_INFO, "Mainboard " CONFIG_MAINBOARD_PART_NUMBER " Enable.\n"); /* Inagua mainboard specific setting */ - set_pcie_dereset(); + init_gpios(); /* * Initialize ASF registers to an arbitrary address because someone diff --git a/src/mainboard/amd/persimmon/mainboard.c b/src/mainboard/amd/persimmon/mainboard.c index fc43f2eac9..916d11d74c 100644 --- a/src/mainboard/amd/persimmon/mainboard.c +++ b/src/mainboard/amd/persimmon/mainboard.c @@ -24,9 +24,6 @@ #include <southbridge/amd/cimx/sb800/pci_devs.h> #include <northbridge/amd/agesa/family14/pci_devs.h> -void set_pcie_reset(void); -void set_pcie_dereset(void); - /*********************************************************** * These arrays set up the FCH PCI_INTR registers 0xC00/0xC01. * This table is responsible for physically routing the PIC and @@ -121,23 +118,6 @@ static void pirq_setup(void) picr_data_ptr = mainboard_picr_data; } -/** - * TODO - * SB CIMx callback - */ -void set_pcie_reset(void) -{ -} - -/** - * TODO - * mainboard specific SB CIMx callback - */ -void set_pcie_dereset(void) -{ -} - - /********************************************** * Enable the dedicated functions of the board. **********************************************/ diff --git a/src/mainboard/amd/south_station/mainboard.c b/src/mainboard/amd/south_station/mainboard.c index 9afe9b4220..b7543122cf 100644 --- a/src/mainboard/amd/south_station/mainboard.c +++ b/src/mainboard/amd/south_station/mainboard.c @@ -20,26 +20,6 @@ #include <southbridge/amd/sb800/sb800.h> #include "SBPLATFORM.h" /* Platfrom Specific Definitions */ - -void set_pcie_reset(void); -void set_pcie_dereset(void); - -/** - * TODO - * SB CIMx callback - */ -void set_pcie_reset(void) -{ -} - -/** - * TODO - * mainboard specific SB CIMx callback - */ -void set_pcie_dereset(void) -{ -} - /** * Southstation using SB GPIO 17/18 to control the Red/Green LED * These two LEDs can be used to show the OS booting status. diff --git a/src/mainboard/amd/torpedo/mainboard.c b/src/mainboard/amd/torpedo/mainboard.c index 1bbfdcdf69..f567db7ca3 100644 --- a/src/mainboard/amd/torpedo/mainboard.c +++ b/src/mainboard/amd/torpedo/mainboard.c @@ -19,25 +19,6 @@ #define ONE_MB 0x100000 //#define SMBUS_IO_BASE 0x6000 -void set_pcie_reset(void); -void set_pcie_dereset(void); - -/** - * TODO - * SB CIMx callback - */ -void set_pcie_reset(void) -{ -} - -/** - * TODO - * mainboard specific SB CIMx callback - */ -void set_pcie_dereset(void) -{ -} - /************************************************* * enable the dedicated function in torpedo board. diff --git a/src/mainboard/amd/union_station/mainboard.c b/src/mainboard/amd/union_station/mainboard.c index ef52e03578..6e206e75d5 100644 --- a/src/mainboard/amd/union_station/mainboard.c +++ b/src/mainboard/amd/union_station/mainboard.c @@ -19,26 +19,6 @@ #include <southbridge/amd/sb800/sb800.h> #include "SBPLATFORM.h" /* Platfrom Specific Definitions */ -void set_pcie_reset(void); -void set_pcie_dereset(void); - -/** - * TODO - * SB CIMx callback - */ -void set_pcie_reset(void) -{ -} - -/** - * TODO - * mainboard specific SB CIMx callback - */ -void set_pcie_dereset(void) -{ -} - - /********************************************** * Enable the dedicated functions of the board. **********************************************/ |