diff options
Diffstat (limited to 'src/mainboard/amd')
29 files changed, 0 insertions, 32 deletions
diff --git a/src/mainboard/amd/db800/devicetree.cb b/src/mainboard/amd/db800/devicetree.cb index 3331a12ee5..781beb59d8 100644 --- a/src/mainboard/amd/db800/devicetree.cb +++ b/src/mainboard/amd/db800/devicetree.cb @@ -65,4 +65,3 @@ chip northbridge/amd/lx end end end - diff --git a/src/mainboard/amd/dbm690t/devicetree.cb b/src/mainboard/amd/dbm690t/devicetree.cb index 8dd971eef2..898537b155 100644 --- a/src/mainboard/amd/dbm690t/devicetree.cb +++ b/src/mainboard/amd/dbm690t/devicetree.cb @@ -119,4 +119,3 @@ chip northbridge/amd/amdk8/root_complex end #northbridge/amd/amdk8 end #domain end #northbridge/amd/amdk8/root_complex - diff --git a/src/mainboard/amd/dinar/buildOpts.c b/src/mainboard/amd/dinar/buildOpts.c index 1f4e891ebc..c55a8a0290 100644 --- a/src/mainboard/amd/dinar/buildOpts.c +++ b/src/mainboard/amd/dinar/buildOpts.c @@ -476,4 +476,3 @@ CONST PSO_ENTRY ROMDATA DefaultPlatformMemoryConfiguration[] = { */ #include "mm.h" #include "mn.h" - diff --git a/src/mainboard/amd/dinar/devicetree.cb b/src/mainboard/amd/dinar/devicetree.cb index 9cc4cf78c4..f895d013e5 100644 --- a/src/mainboard/amd/dinar/devicetree.cb +++ b/src/mainboard/amd/dinar/devicetree.cb @@ -106,4 +106,3 @@ chip northbridge/amd/agesa/family15/root_complex end #chip northbridge/amd/agesa/family15 # CPU side of HT root complex end #domain end #northbridge/amd/agesa/family15/root_complex - diff --git a/src/mainboard/amd/inagua/Kconfig b/src/mainboard/amd/inagua/Kconfig index c79a0b33f8..d2bf5d0f84 100644 --- a/src/mainboard/amd/inagua/Kconfig +++ b/src/mainboard/amd/inagua/Kconfig @@ -80,4 +80,3 @@ config SB800_AHCI_ROM default n endif # BOARD_AMD_INAGUA - diff --git a/src/mainboard/amd/inagua/buildOpts.c b/src/mainboard/amd/inagua/buildOpts.c index 95ee913cc9..9dfc3c7f62 100644 --- a/src/mainboard/amd/inagua/buildOpts.c +++ b/src/mainboard/amd/inagua/buildOpts.c @@ -392,4 +392,3 @@ CONST PSO_ENTRY ROMDATA DefaultPlatformMemoryConfiguration[] = { */ #include "mm.h" #include "mn.h" - diff --git a/src/mainboard/amd/inagua/devicetree.cb b/src/mainboard/amd/inagua/devicetree.cb index 57eabd966f..619d004ea1 100644 --- a/src/mainboard/amd/inagua/devicetree.cb +++ b/src/mainboard/amd/inagua/devicetree.cb @@ -94,4 +94,3 @@ chip northbridge/amd/agesa/family14/root_complex end #chip northbridge/amd/agesa/family14 # CPU side of HT root complex end #domain end #northbridge/amd/agesa/family14/root_complex - diff --git a/src/mainboard/amd/lamar/acpi/si.asl b/src/mainboard/amd/lamar/acpi/si.asl index 9520d581fd..de94071dfd 100644 --- a/src/mainboard/amd/lamar/acpi/si.asl +++ b/src/mainboard/amd/lamar/acpi/si.asl @@ -24,5 +24,3 @@ /* DBGO("\n") */ } } /* End Scope SI */ - - diff --git a/src/mainboard/amd/norwich/devicetree.cb b/src/mainboard/amd/norwich/devicetree.cb index 93effaa717..9a0121d8c1 100644 --- a/src/mainboard/amd/norwich/devicetree.cb +++ b/src/mainboard/amd/norwich/devicetree.cb @@ -38,4 +38,3 @@ chip northbridge/amd/lx end end end - diff --git a/src/mainboard/amd/olivehill/buildOpts.c b/src/mainboard/amd/olivehill/buildOpts.c index 4fe1b4813a..fefac7e7ed 100644 --- a/src/mainboard/amd/olivehill/buildOpts.c +++ b/src/mainboard/amd/olivehill/buildOpts.c @@ -454,4 +454,3 @@ CONST PSO_ENTRY ROMDATA DefaultPlatformMemoryConfiguration[] = { */ #include "mm.h" #include "mn.h" - diff --git a/src/mainboard/amd/olivehillplus/acpi/usb_oc.asl b/src/mainboard/amd/olivehillplus/acpi/usb_oc.asl index b776d68cd1..3d90ba7ddf 100644 --- a/src/mainboard/amd/olivehillplus/acpi/usb_oc.asl +++ b/src/mainboard/amd/olivehillplus/acpi/usb_oc.asl @@ -38,4 +38,3 @@ Name(UOM6, 6) Name(UOM7, 2) Name(UOM8, 6) Name(UOM9, 6) - diff --git a/src/mainboard/amd/parmer/buildOpts.c b/src/mainboard/amd/parmer/buildOpts.c index 2e654a77da..09629dd0b8 100644 --- a/src/mainboard/amd/parmer/buildOpts.c +++ b/src/mainboard/amd/parmer/buildOpts.c @@ -447,4 +447,3 @@ CONST PSO_ENTRY ROMDATA DefaultPlatformMemoryConfiguration[] = { */ #include "mm.h" #include "mn.h" - diff --git a/src/mainboard/amd/persimmon/buildOpts.c b/src/mainboard/amd/persimmon/buildOpts.c index 93cfa8d7f2..244ab31243 100644 --- a/src/mainboard/amd/persimmon/buildOpts.c +++ b/src/mainboard/amd/persimmon/buildOpts.c @@ -392,4 +392,3 @@ CONST PSO_ENTRY ROMDATA DefaultPlatformMemoryConfiguration[] = { */ #include "mm.h" #include "mn.h" - diff --git a/src/mainboard/amd/pistachio/acpi_tables.c b/src/mainboard/amd/pistachio/acpi_tables.c index 0ef181d3e5..628abfd192 100644 --- a/src/mainboard/amd/pistachio/acpi_tables.c +++ b/src/mainboard/amd/pistachio/acpi_tables.c @@ -56,4 +56,3 @@ unsigned long acpi_fill_madt(unsigned long current) return current; } - diff --git a/src/mainboard/amd/pistachio/devicetree.cb b/src/mainboard/amd/pistachio/devicetree.cb index 760e5abb00..805df7cb41 100644 --- a/src/mainboard/amd/pistachio/devicetree.cb +++ b/src/mainboard/amd/pistachio/devicetree.cb @@ -78,4 +78,3 @@ chip northbridge/amd/amdk8/root_complex end #northbridge/amd/amdk8 end #domain end #northbridge/amd/amdk8/root_complex - diff --git a/src/mainboard/amd/rumba/devicetree.cb b/src/mainboard/amd/rumba/devicetree.cb index a7a352f8f7..62fb28735e 100644 --- a/src/mainboard/amd/rumba/devicetree.cb +++ b/src/mainboard/amd/rumba/devicetree.cb @@ -18,4 +18,3 @@ chip northbridge/amd/gx2 end end end - diff --git a/src/mainboard/amd/serengeti_cheetah/devicetree.cb b/src/mainboard/amd/serengeti_cheetah/devicetree.cb index 28b7e01ac6..8ff0e3effe 100644 --- a/src/mainboard/amd/serengeti_cheetah/devicetree.cb +++ b/src/mainboard/amd/serengeti_cheetah/devicetree.cb @@ -145,5 +145,3 @@ chip northbridge/amd/amdk8/root_complex end #domain end - - diff --git a/src/mainboard/amd/serengeti_cheetah/readme_acpi.txt b/src/mainboard/amd/serengeti_cheetah/readme_acpi.txt index 5d2755425e..b999dfacbf 100644 --- a/src/mainboard/amd/serengeti_cheetah/readme_acpi.txt +++ b/src/mainboard/amd/serengeti_cheetah/readme_acpi.txt @@ -27,4 +27,3 @@ use c to delele hex file yhlu 09/18/2005 - diff --git a/src/mainboard/amd/serengeti_cheetah_fam10/devicetree.cb b/src/mainboard/amd/serengeti_cheetah_fam10/devicetree.cb index 8b5d817708..54c34f8bec 100644 --- a/src/mainboard/amd/serengeti_cheetah_fam10/devicetree.cb +++ b/src/mainboard/amd/serengeti_cheetah_fam10/devicetree.cb @@ -135,5 +135,3 @@ chip northbridge/amd/amdfam10/root_complex # end #domain end - - diff --git a/src/mainboard/amd/serengeti_cheetah_fam10/mainboard.h b/src/mainboard/amd/serengeti_cheetah_fam10/mainboard.h index b152b047fb..fc2dcafd30 100644 --- a/src/mainboard/amd/serengeti_cheetah_fam10/mainboard.h +++ b/src/mainboard/amd/serengeti_cheetah_fam10/mainboard.h @@ -1,2 +1 @@ unsigned long mainboard_write_acpi_tables(device_t device, unsigned long start, acpi_rsdp_t *rsdp); - diff --git a/src/mainboard/amd/south_station/Kconfig b/src/mainboard/amd/south_station/Kconfig index 53386c57a8..1d3348d427 100644 --- a/src/mainboard/amd/south_station/Kconfig +++ b/src/mainboard/amd/south_station/Kconfig @@ -73,4 +73,3 @@ config VGA_BIOS_ID default "1002,9806" endif # BOARD_AMD_SOUTHSTATION - diff --git a/src/mainboard/amd/south_station/buildOpts.c b/src/mainboard/amd/south_station/buildOpts.c index 716030cad0..d2882a750f 100644 --- a/src/mainboard/amd/south_station/buildOpts.c +++ b/src/mainboard/amd/south_station/buildOpts.c @@ -392,4 +392,3 @@ CONST PSO_ENTRY ROMDATA DefaultPlatformMemoryConfiguration[] = { */ #include "mm.h" #include "mn.h" - diff --git a/src/mainboard/amd/south_station/devicetree.cb b/src/mainboard/amd/south_station/devicetree.cb index 0a3532fb55..76bedfb44f 100644 --- a/src/mainboard/amd/south_station/devicetree.cb +++ b/src/mainboard/amd/south_station/devicetree.cb @@ -109,4 +109,3 @@ chip northbridge/amd/agesa/family14/root_complex end #chip northbridge/amd/agesa/family14 # CPU side of HT root complex end #domain end #northbridge/amd/agesa/family14/root_complex - diff --git a/src/mainboard/amd/thatcher/buildOpts.c b/src/mainboard/amd/thatcher/buildOpts.c index 4499840ff9..af22e65fee 100644 --- a/src/mainboard/amd/thatcher/buildOpts.c +++ b/src/mainboard/amd/thatcher/buildOpts.c @@ -447,4 +447,3 @@ CONST PSO_ENTRY ROMDATA DefaultPlatformMemoryConfiguration[] = { */ #include "mm.h" #include "mn.h" - diff --git a/src/mainboard/amd/torpedo/buildOpts.c b/src/mainboard/amd/torpedo/buildOpts.c index 08fcb4d088..09067861ac 100644 --- a/src/mainboard/amd/torpedo/buildOpts.c +++ b/src/mainboard/amd/torpedo/buildOpts.c @@ -318,4 +318,3 @@ CONST PSO_ENTRY ROMDATA DefaultPlatformMemoryConfiguration[] = { */ #include "mm.h" #include "mn.h" - diff --git a/src/mainboard/amd/torpedo/devicetree.cb b/src/mainboard/amd/torpedo/devicetree.cb index 8fe9e53f3c..c46d1800aa 100644 --- a/src/mainboard/amd/torpedo/devicetree.cb +++ b/src/mainboard/amd/torpedo/devicetree.cb @@ -87,4 +87,3 @@ chip northbridge/amd/agesa/family12/root_complex end #chip northbridge/amd/agesa/family12 # CPU side of HT root complex end #domain end #northbridge/amd/agesa/family12/root_complex - diff --git a/src/mainboard/amd/union_station/Kconfig b/src/mainboard/amd/union_station/Kconfig index ea69fc46a0..4a4a632254 100644 --- a/src/mainboard/amd/union_station/Kconfig +++ b/src/mainboard/amd/union_station/Kconfig @@ -72,4 +72,3 @@ config VGA_BIOS_ID default "1002,9802" endif # BOARD_AMD_UNIONSTATION - diff --git a/src/mainboard/amd/union_station/buildOpts.c b/src/mainboard/amd/union_station/buildOpts.c index 716030cad0..d2882a750f 100644 --- a/src/mainboard/amd/union_station/buildOpts.c +++ b/src/mainboard/amd/union_station/buildOpts.c @@ -392,4 +392,3 @@ CONST PSO_ENTRY ROMDATA DefaultPlatformMemoryConfiguration[] = { */ #include "mm.h" #include "mn.h" - diff --git a/src/mainboard/amd/union_station/devicetree.cb b/src/mainboard/amd/union_station/devicetree.cb index 0124b17c65..bf98359db5 100644 --- a/src/mainboard/amd/union_station/devicetree.cb +++ b/src/mainboard/amd/union_station/devicetree.cb @@ -85,4 +85,3 @@ chip northbridge/amd/agesa/family14/root_complex end #chip northbridge/amd/agesa/family14 # CPU side of HT root complex end #domain end #northbridge/amd/agesa/family14/root_complex - |