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-rw-r--r--src/mainboard/amd/chausie/Kconfig4
-rw-r--r--src/mainboard/amd/chausie/devicetree.cb2
2 files changed, 3 insertions, 3 deletions
diff --git a/src/mainboard/amd/chausie/Kconfig b/src/mainboard/amd/chausie/Kconfig
index 477620ca47..e9fd743fbb 100644
--- a/src/mainboard/amd/chausie/Kconfig
+++ b/src/mainboard/amd/chausie/Kconfig
@@ -6,7 +6,7 @@ config BOARD_SPECIFIC_OPTIONS
def_bool y
select BOARD_ROMSIZE_KB_16384
select EC_ACPI
- select SOC_AMD_SABRINA
+ select SOC_AMD_MENDOCINO
select SOC_AMD_COMMON_BLOCK_USE_ESPI
select AMD_SOC_CONSOLE_UART
select MAINBOARD_HAS_CHROMEOS
@@ -74,7 +74,7 @@ config RO_REGION_ONLY
string
depends on VBOOT_SLOTS_RW_AB || VBOOT_SLOTS_RW_A
# Add the EFS and EC to the RO region only
- # This is a chausie-specific override of soc/amd/sabrina/Kconfig
+ # This is a chausie-specific override of soc/amd/mendocino/Kconfig
default "apu/amdfw apu/ecfw"
config CHROMEOS
diff --git a/src/mainboard/amd/chausie/devicetree.cb b/src/mainboard/amd/chausie/devicetree.cb
index c0806a5c07..5cfd42f0f1 100644
--- a/src/mainboard/amd/chausie/devicetree.cb
+++ b/src/mainboard/amd/chausie/devicetree.cb
@@ -1,6 +1,6 @@
# SPDX-License-Identifier: GPL-2.0-only
-chip soc/amd/sabrina
+chip soc/amd/mendocino
register "common_config.espi_config" = "{
.std_io_decode_bitmap = ESPI_DECODE_IO_0x80_EN | ESPI_DECODE_IO_0X2E_0X2F_EN | ESPI_DECODE_IO_0X60_0X64_EN,
.generic_io_range[0] = {