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Diffstat (limited to 'src/mainboard/amd/pistachio')
-rw-r--r--src/mainboard/amd/pistachio/cache_as_ram_auto.c27
1 files changed, 19 insertions, 8 deletions
diff --git a/src/mainboard/amd/pistachio/cache_as_ram_auto.c b/src/mainboard/amd/pistachio/cache_as_ram_auto.c
index 52b5c0400a..c348a61f9d 100644
--- a/src/mainboard/amd/pistachio/cache_as_ram_auto.c
+++ b/src/mainboard/amd/pistachio/cache_as_ram_auto.c
@@ -155,6 +155,7 @@ void real_main(unsigned long bist, unsigned long cpu_init_detectedx)
int needs_reset = 0;
u32 bsp_apicid = 0;
msr_t msr;
+ struct cpuid_result cpuid1;
struct sys_info *sysinfo =
(struct sys_info *)(DCACHE_RAM_BASE + DCACHE_RAM_SIZE -
DCACHE_RAM_GLOBAL_VAR_SIZE);
@@ -198,16 +199,26 @@ void real_main(unsigned long bist, unsigned long cpu_init_detectedx)
post_code(0x04);
- msr = rdmsr(0xc0010042);
- printk_debug("begin msr fid, vid: hi=0x%x, lo=0x%x\n", msr.hi, msr.lo);
+ /* Check to see if processor is capable of changing FIDVID */
+ /* otherwise it will throw a GP# when reading FIDVID_STATUS */
+ cpuid1 = cpuid(0x80000007);
+ if( (cpuid1.edx & 0x6) == 0x6 ) {
- enable_fid_change();
- enable_fid_change_on_sb(sysinfo->sbbusn, sysinfo->sbdn);
- init_fidvid_bsp(bsp_apicid);
+ /* Read FIDVID_STATUS */
+ msr=rdmsr(0xc0010042);
+ printk_debug("begin msr fid, vid: hi=0x%x, lo=0x%x\n", msr.hi, msr.lo);
- // show final fid and vid
- msr = rdmsr(0xc0010042);
- printk_debug("end msr fid, vid: hi=0x%x, lo=0x%x\n", msr.hi, msr.lo);
+ enable_fid_change();
+ enable_fid_change_on_sb(sysinfo->sbbusn, sysinfo->sbdn);
+ init_fidvid_bsp(bsp_apicid);
+
+ /* show final fid and vid */
+ msr=rdmsr(0xc0010042);
+ printk_debug("end msr fid, vid: hi=0x%x, lo=0x%x\n", msr.hi, msr.lo);
+
+ } else {
+ printk_debug("Changing FIDVID not supported\n");
+ }
post_code(0x05);