diff options
Diffstat (limited to 'src/mainboard/amd/parmer')
| -rw-r--r-- | src/mainboard/amd/parmer/PlatformGnbPcie.c | 14 |
1 files changed, 7 insertions, 7 deletions
diff --git a/src/mainboard/amd/parmer/PlatformGnbPcie.c b/src/mainboard/amd/parmer/PlatformGnbPcie.c index cc25cb2732..003fc01a83 100644 --- a/src/mainboard/amd/parmer/PlatformGnbPcie.c +++ b/src/mainboard/amd/parmer/PlatformGnbPcie.c @@ -75,48 +75,48 @@ static const PCIe_PORT_DESCRIPTOR PortList [] = { /* PCIe port, Lanes 8:23, PCI Device Number 2, PCIE SLOT0 x16 */ { - 0, /* Descriptor flags */ + 0, PCIE_ENGINE_DATA_INITIALIZER (PciePortEngine, 8, 23), PCIE_PORT_DATA_INITIALIZER (PortEnabled, ChannelTypeExt6db, 2, HotplugDisabled, PcieGenMaxSupported, PcieGenMaxSupported, AspmDisabled, 1) }, /* PCIe port, Lanes 16:23, PCI Device Number 3, Disabled */ { - 0, /* Descriptor flags */ + 0, PCIE_ENGINE_DATA_INITIALIZER (PcieUnusedEngine, 16, 23), PCIE_PORT_DATA_INITIALIZER (PortDisabled, ChannelTypeExt6db, 3, HotplugDisabled, PcieGenMaxSupported, PcieGenMaxSupported, AspmDisabled, 1) }, /* PCIe port, Lanes 4, PCI Device Number 4, PCIE MINI0 */ { - 0, /* Descriptor flags */ + 0, PCIE_ENGINE_DATA_INITIALIZER (PciePortEngine, 4, 4), PCIE_PORT_DATA_INITIALIZER (PortEnabled, ChannelTypeExt6db, 4, HotplugDisabled, PcieGenMaxSupported, PcieGenMaxSupported, AspmDisabled, 1) }, /* PCIe port, Lanes 5, PCI Device Number 5, PCIE MINI1 */ { - 0, /* Descriptor flags */ + 0, PCIE_ENGINE_DATA_INITIALIZER (PciePortEngine, 5, 5), PCIE_PORT_DATA_INITIALIZER (PortEnabled, ChannelTypeExt6db, 5, HotplugDisabled, PcieGenMaxSupported, PcieGenMaxSupported, AspmDisabled, 1) }, /* PCIe port, Lanes 6, PCI Device Number 6, PCIE SLOT1 x1 */ { - 0, /* Descriptor flags */ + 0, PCIE_ENGINE_DATA_INITIALIZER (PciePortEngine, 6, 6), PCIE_PORT_DATA_INITIALIZER (PortEnabled, ChannelTypeExt6db, 6, HotplugDisabled, PcieGenMaxSupported, PcieGenMaxSupported, AspmDisabled, 1) }, /* PCIe port, Lanes 7, PCI Device Number 7, LAN */ { - 0, /* Descriptor flags */ + 0, PCIE_ENGINE_DATA_INITIALIZER (PciePortEngine, 7, 7), PCIE_PORT_DATA_INITIALIZER (PortEnabled, ChannelTypeExt6db, 7, HotplugDisabled, PcieGenMaxSupported, PcieGenMaxSupported, AspmDisabled, 1) }, /* PCIe port, Lanes 0:3, PCI Device Number 8, Bridge to FCH */ { - DESCRIPTOR_TERMINATE_LIST, /* Descriptor flags !!!IMPORTANT!!! Terminate last element of array */ + DESCRIPTOR_TERMINATE_LIST, PCIE_ENGINE_DATA_INITIALIZER (PciePortEngine, 0, 3), PCIE_PORT_DATA_INITIALIZER (PortEnabled, ChannelTypeExt6db, 8, HotplugDisabled, PcieGenMaxSupported, PcieGenMaxSupported, AspmDisabled, 0) }, |