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-rw-r--r--src/mainboard/amd/olivehill/agesawrapper.c7
-rw-r--r--src/mainboard/amd/olivehill/romstage.c4
2 files changed, 4 insertions, 7 deletions
diff --git a/src/mainboard/amd/olivehill/agesawrapper.c b/src/mainboard/amd/olivehill/agesawrapper.c
index 22522db291..242aa27b2f 100644
--- a/src/mainboard/amd/olivehill/agesawrapper.c
+++ b/src/mainboard/amd/olivehill/agesawrapper.c
@@ -104,8 +104,6 @@ AGESA_STATUS agesawrapper_amdinitmmio(void)
{
AGESA_STATUS Status;
UINT64 MsrReg;
- UINT32 PciData;
- PCI_ADDR PciAddress;
AMD_CONFIG_PARAMS StdHeader;
/*
@@ -122,11 +120,6 @@ AGESA_STATUS agesawrapper_amdinitmmio(void)
MsrReg = MsrReg | 0x0000400000000000;
LibAmdMsrWrite (0xC001001F, &MsrReg, &StdHeader);
- /* For serial port */
- PciData = 0xFF03FFD5;
- PciAddress.AddressValue = MAKE_SBDFO (0, 0, 0x14, 0x3, 0x44);
- LibAmdPciWrite(AccessWidth32, PciAddress, &PciData, &StdHeader);
-
/* Set ROM cache onto WP to decrease post time */
MsrReg = (0x0100000000ull - CACHE_ROM_SIZE) | 5ull;
LibAmdMsrWrite (0x20C, &MsrReg, &StdHeader);
diff --git a/src/mainboard/amd/olivehill/romstage.c b/src/mainboard/amd/olivehill/romstage.c
index 0a982b6fe8..1ff7a0b084 100644
--- a/src/mainboard/amd/olivehill/romstage.c
+++ b/src/mainboard/amd/olivehill/romstage.c
@@ -53,6 +53,10 @@ void cache_as_ram_main(unsigned long bist, unsigned long cpu_init_detectedx)
AGESAWRAPPER_PRE_CONSOLE(amdinitmmio);
+ /* Set LPC decode enables. */
+ pci_devfn_t dev = PCI_DEV(0, 0x14, 3);
+ pci_write_config32(dev, 0x44, 0xff03ffd5);
+
hudson_lpc_port80();
if (!cpu_init_detectedx && boot_cpu()) {