aboutsummaryrefslogtreecommitdiff
path: root/src/mainboard/amd/dinar
diff options
context:
space:
mode:
Diffstat (limited to 'src/mainboard/amd/dinar')
-rw-r--r--src/mainboard/amd/dinar/buildOpts.c4
-rw-r--r--src/mainboard/amd/dinar/romstage.c4
2 files changed, 4 insertions, 4 deletions
diff --git a/src/mainboard/amd/dinar/buildOpts.c b/src/mainboard/amd/dinar/buildOpts.c
index 958764eaaf..3aa4e91c34 100644
--- a/src/mainboard/amd/dinar/buildOpts.c
+++ b/src/mainboard/amd/dinar/buildOpts.c
@@ -33,8 +33,8 @@
* @e \$Revision: 6049 $ @e \$Date: 2008-05-14 01:58:02 -0500 (Wed, 14 May 2008) $
*/
#include <stdlib.h>
-#include "AGESA.h"
-#include "CommonReturns.h"
+#include "AGESA.h"
+#include "CommonReturns.h"
#include "Filecode.h"
#define FILECODE PLATFORM_SPECIFIC_OPTIONS_FILECODE
//#define OPTION_HW_DQS_REC_EN_TRAINING TRUE
diff --git a/src/mainboard/amd/dinar/romstage.c b/src/mainboard/amd/dinar/romstage.c
index 1156ec4625..842b4f0ec7 100644
--- a/src/mainboard/amd/dinar/romstage.c
+++ b/src/mainboard/amd/dinar/romstage.c
@@ -76,8 +76,8 @@ void cache_as_ram_main(unsigned long bist, unsigned long cpu_init_detectedx)
// Load MPB
val = cpuid_eax(1);
- printk(BIOS_DEBUG, "BSP Family_Model: %08x \n", val);
- printk(BIOS_DEBUG, "cpu_init_detectedx = %08lx \n", cpu_init_detectedx);
+ printk(BIOS_DEBUG, "BSP Family_Model: %08x\n", val);
+ printk(BIOS_DEBUG, "cpu_init_detectedx = %08lx\n", cpu_init_detectedx);
if(boot_cpu()) {
post_code(0x34);