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path: root/src/mainboard/amd/dbm690t/romstage.c
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Diffstat (limited to 'src/mainboard/amd/dbm690t/romstage.c')
-rw-r--r--src/mainboard/amd/dbm690t/romstage.c8
1 files changed, 5 insertions, 3 deletions
diff --git a/src/mainboard/amd/dbm690t/romstage.c b/src/mainboard/amd/dbm690t/romstage.c
index 7a0c8f936b..c9a04f5eef 100644
--- a/src/mainboard/amd/dbm690t/romstage.c
+++ b/src/mainboard/amd/dbm690t/romstage.c
@@ -30,7 +30,8 @@
#include "lib/delay.c"
#include "cpu/x86/lapic.h"
#include "northbridge/amd/amdk8/reset_test.c"
-#include "superio/ite/it8712f/early_serial.c"
+#include <superio/ite/common/ite.h>
+#include <superio/ite/it8712f/it8712f.h>
#include <spd.h>
#include "cpu/x86/bist.h"
#include "northbridge/amd/amdk8/setup_resource_map.c"
@@ -38,6 +39,8 @@
#include "southbridge/amd/sb600/early_setup.c"
#include "northbridge/amd/amdk8/debug.c" /* After sb600_early_setup.c! */
+#define SERIAL_DEV PNP_DEV(0x2e, IT8712F_SP1)
+
static void memreset(int controllers, const struct mem_controller *ctrl) { }
static void activate_spd_rom(const struct mem_controller *ctrl) { }
@@ -80,8 +83,7 @@ void cache_as_ram_main(unsigned long bist, unsigned long cpu_init_detectedx)
enable_rs690_dev8();
sb600_lpc_init();
- /* it8712f_enable_serial does not use its 1st parameter. */
- it8712f_enable_serial(0, CONFIG_TTYS0_BASE);
+ ite_enable_serial(SERIAL_DEV, CONFIG_TTYS0_BASE);
console_init();