diff options
Diffstat (limited to 'src/mainboard/amd/db-ft3b-lc')
-rw-r--r-- | src/mainboard/amd/db-ft3b-lc/mainboard.c | 4 | ||||
-rw-r--r-- | src/mainboard/amd/db-ft3b-lc/romstage.c | 34 |
2 files changed, 10 insertions, 28 deletions
diff --git a/src/mainboard/amd/db-ft3b-lc/mainboard.c b/src/mainboard/amd/db-ft3b-lc/mainboard.c index 6f8742c20a..419a57d8fa 100644 --- a/src/mainboard/amd/db-ft3b-lc/mainboard.c +++ b/src/mainboard/amd/db-ft3b-lc/mainboard.c @@ -17,7 +17,6 @@ #include <arch/acpi.h> #include <arch/io.h> #include <console/console.h> -#include <cpu/amd/pi/s3_resume.h> #include <device/device.h> #include <device/pci.h> #include <device/pci_def.h> @@ -125,9 +124,6 @@ static void mainboard_enable(device_t dev) { printk(BIOS_INFO, "Mainboard " CONFIG_MAINBOARD_PART_NUMBER " Enable.\n"); - if (acpi_is_wakeup_s3()) - agesawrapper_fchs3earlyrestore(); - /* Initialize the PIRQ data structures for consumption */ pirq_setup(); } diff --git a/src/mainboard/amd/db-ft3b-lc/romstage.c b/src/mainboard/amd/db-ft3b-lc/romstage.c index 79cc0f9a42..0ba1c1dfea 100644 --- a/src/mainboard/amd/db-ft3b-lc/romstage.c +++ b/src/mainboard/amd/db-ft3b-lc/romstage.c @@ -17,7 +17,6 @@ #include <string.h> #include <device/pci_def.h> #include <device/pci_ids.h> -#include <arch/acpi.h> #include <arch/io.h> #include <arch/stages.h> #include <device/pnp_def.h> @@ -31,7 +30,6 @@ #include <cpu/x86/bist.h> #include <cpu/x86/lapic.h> #include <southbridge/amd/pi/hudson/hudson.h> -#include <cpu/amd/pi/s3_resume.h> void cache_as_ram_main(unsigned long bist, unsigned long cpu_init_detectedx) { @@ -77,28 +75,16 @@ void cache_as_ram_main(unsigned long bist, unsigned long cpu_init_detectedx) post_code(0x39); AGESAWRAPPER(amdinitearly); - int s3resume = acpi_is_wakeup_s3(); - if (!s3resume) { - post_code(0x40); - AGESAWRAPPER(amdinitpost); - - post_code(0x41); - AGESAWRAPPER(amdinitenv); - /* - If code hangs here, please check cahaltasm.S - */ - disable_cache_as_ram(); - } else { /* S3 detect */ - printk(BIOS_INFO, "S3 detected\n"); - - post_code(0x60); - AGESAWRAPPER(amdinitresume); - - AGESAWRAPPER(amds3laterestore); - - post_code(0x61); - prepare_for_resume(); - } + + post_code(0x40); + AGESAWRAPPER(amdinitpost); + + post_code(0x41); + AGESAWRAPPER(amdinitenv); + /* + If code hangs here, please check cahaltasm.S + */ + disable_cache_as_ram(); outb(0xEA, 0xCD6); outb(0x1, 0xcd7); |