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-rw-r--r--src/include/device/device.h2
-rw-r--r--src/include/device/dram/ddr2.h2
-rw-r--r--src/include/device/pci_def.h2
3 files changed, 3 insertions, 3 deletions
diff --git a/src/include/device/device.h b/src/include/device/device.h
index 113969ca1d..41ec528cbd 100644
--- a/src/include/device/device.h
+++ b/src/include/device/device.h
@@ -229,7 +229,7 @@ void mp_init_cpus(DEVTREE_CONST struct bus *cpu_bus);
static inline void mp_cpu_bus_init(struct device *dev)
{
/*
- * When no LAPIC device is specified in the devietree inside the CPU cluster device,
+ * When no LAPIC device is specified in the devicetree inside the CPU cluster device,
* neither a LAPIC device nor the link/bus between the CPU cluster and the LAPIC device
* will be present in the static device tree and the link_list struct element of the
* CPU cluster device will be NULL. In this case add one link, so that the
diff --git a/src/include/device/dram/ddr2.h b/src/include/device/dram/ddr2.h
index 032d5ce4cc..f3605b289d 100644
--- a/src/include/device/dram/ddr2.h
+++ b/src/include/device/dram/ddr2.h
@@ -92,7 +92,7 @@ struct dimm_attr_ddr2_st {
u8 rev;
/* Supported CAS mask, bit 0 == CL0 .. bit7 == CL7 */
u8 cas_supported;
- /* Maximum cloclk to data cycle times for various CAS.
+ /* Maximum clock to data cycle times for various CAS.
* Fields 0 and 1 are unused. */
u32 cycle_time[8];
/* Maximum data access times for various CAS.
diff --git a/src/include/device/pci_def.h b/src/include/device/pci_def.h
index 9ecd50ab2d..8b90163a1e 100644
--- a/src/include/device/pci_def.h
+++ b/src/include/device/pci_def.h
@@ -24,7 +24,7 @@
#define PCI_STATUS 0x06 /* 16 bits */
#define PCI_STATUS_CAP_LIST 0x10 /* Support Capability List */
-#define PCI_STATUS_66MHZ 0x20 /* Support 66 Mhz PCI 2.1 bus */
+#define PCI_STATUS_66MHZ 0x20 /* Support 66 MHz PCI 2.1 bus */
/* Support User Definable Features [obsolete] */
#define PCI_STATUS_UDF 0x40
#define PCI_STATUS_FAST_BACK 0x80 /* Accept fast-back to back */