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-rw-r--r--src/include/cpu/amd/amdfam10_sysconf.h52
-rw-r--r--src/include/cpu/amd/amdk8_sysconf.h18
-rw-r--r--src/include/cpu/amd/mtrr.h4
-rw-r--r--src/include/cpu/x86/msr.h18
-rw-r--r--src/include/cpu/x86/mtrr.h3
-rw-r--r--src/include/cpu/x86/tsc.h4
6 files changed, 50 insertions, 49 deletions
diff --git a/src/include/cpu/amd/amdfam10_sysconf.h b/src/include/cpu/amd/amdfam10_sysconf.h
index ade78c8b75..bff65ec917 100644
--- a/src/include/cpu/amd/amdfam10_sysconf.h
+++ b/src/include/cpu/amd/amdfam10_sysconf.h
@@ -21,41 +21,41 @@
#include <cpu/x86/msr.h>
struct p_state_t {
- unsigned corefreq;
- unsigned power;
- unsigned transition_lat;
- unsigned busmaster_lat;
- unsigned control;
- unsigned status;
+ unsigned int corefreq;
+ unsigned int power;
+ unsigned int transition_lat;
+ unsigned int busmaster_lat;
+ unsigned int control;
+ unsigned int status;
};
struct amdfam10_sysconf_t {
//ht
- unsigned hc_possible_num;
- unsigned pci1234[HC_POSSIBLE_NUM];
- unsigned hcdn[HC_POSSIBLE_NUM];
- unsigned hcid[HC_POSSIBLE_NUM]; //record ht chain type
- unsigned sbdn;
- unsigned sblk;
+ unsigned int hc_possible_num;
+ unsigned int pci1234[HC_POSSIBLE_NUM];
+ unsigned int hcdn[HC_POSSIBLE_NUM];
+ unsigned int hcid[HC_POSSIBLE_NUM]; //record ht chain type
+ unsigned int sbdn;
+ unsigned int sblk;
- unsigned nodes;
- unsigned ht_c_num; // we only can have 32 ht chain at most
- unsigned ht_c_conf_bus[HC_NUMS]; // 4-->32: 4:segn, 8:bus_max, 8:bus_min, 4:linkn, 6: nodeid, 2: enable
- unsigned io_addr_num;
- unsigned conf_io_addr[HC_NUMS];
- unsigned conf_io_addrx[HC_NUMS];
- unsigned mmio_addr_num;
- unsigned conf_mmio_addr[HC_NUMS*2]; // mem and pref mem
- unsigned conf_mmio_addrx[HC_NUMS*2];
- unsigned segbit;
- unsigned hcdn_reg[HC_NUMS]; // it will be used by get_pci1234
+ unsigned int nodes;
+ unsigned int ht_c_num; // we only can have 32 ht chain at most
+ unsigned int ht_c_conf_bus[HC_NUMS]; // 4-->32: 4:segn, 8:bus_max, 8:bus_min, 4:linkn, 6: nodeid, 2: enable
+ unsigned int io_addr_num;
+ unsigned int conf_io_addr[HC_NUMS];
+ unsigned int conf_io_addrx[HC_NUMS];
+ unsigned int mmio_addr_num;
+ unsigned int conf_mmio_addr[HC_NUMS*2]; // mem and pref mem
+ unsigned int conf_mmio_addrx[HC_NUMS*2];
+ unsigned int segbit;
+ unsigned int hcdn_reg[HC_NUMS]; // it will be used by get_pci1234
msr_t msr_pstate[NODE_NUMS * 5]; // quad cores all cores in one node should be the same, and p0,..p5
- unsigned needs_update_pstate_msrs;
+ unsigned int needs_update_pstate_msrs;
- unsigned bsp_apicid;
+ unsigned int bsp_apicid;
int enabled_apic_ext_id;
- unsigned lift_bsp_apicid;
+ unsigned int lift_bsp_apicid;
int apicid_offset;
void *mb; // pointer for mb related struct
diff --git a/src/include/cpu/amd/amdk8_sysconf.h b/src/include/cpu/amd/amdk8_sysconf.h
index 87bd4d5dc5..665f9f96b9 100644
--- a/src/include/cpu/amd/amdk8_sysconf.h
+++ b/src/include/cpu/amd/amdk8_sysconf.h
@@ -5,18 +5,18 @@
struct amdk8_sysconf_t {
//ht
- unsigned nodes;
- unsigned hc_possible_num;
- unsigned pci1234[HC_POSSIBLE_NUM];
- unsigned hcdn[HC_POSSIBLE_NUM];
- unsigned hcid[HC_POSSIBLE_NUM]; //record ht chain type
- unsigned sbdn;
- unsigned sblk;
+ unsigned int nodes;
+ unsigned int hc_possible_num;
+ unsigned int pci1234[HC_POSSIBLE_NUM];
+ unsigned int hcdn[HC_POSSIBLE_NUM];
+ unsigned int hcid[HC_POSSIBLE_NUM]; //record ht chain type
+ unsigned int sbdn;
+ unsigned int sblk;
- unsigned hcdn_reg[4]; // it will be used by get_sblk_pci1234
+ unsigned int hcdn_reg[4]; // it will be used by get_sblk_pci1234
int enabled_apic_ext_id;
- unsigned lift_bsp_apicid;
+ unsigned int lift_bsp_apicid;
int apicid_offset;
void *mb; // pointer for mb related struct
diff --git a/src/include/cpu/amd/mtrr.h b/src/include/cpu/amd/mtrr.h
index 7da6cd1142..8099a3d1fe 100644
--- a/src/include/cpu/amd/mtrr.h
+++ b/src/include/cpu/amd/mtrr.h
@@ -42,7 +42,7 @@
void amd_setup_mtrrs(void);
-static inline __attribute__((always_inline)) msr_t rdmsr_amd(unsigned index)
+static inline __attribute__((always_inline)) msr_t rdmsr_amd(unsigned int index)
{
msr_t result;
__asm__ __volatile__ (
@@ -53,7 +53,7 @@ static inline __attribute__((always_inline)) msr_t rdmsr_amd(unsigned index)
return result;
}
-static inline __attribute__((always_inline)) void wrmsr_amd(unsigned index, msr_t msr)
+static inline __attribute__((always_inline)) void wrmsr_amd(unsigned int index, msr_t msr)
{
__asm__ __volatile__ (
"wrmsr"
diff --git a/src/include/cpu/x86/msr.h b/src/include/cpu/x86/msr.h
index f830f3ba3b..c663d29c36 100644
--- a/src/include/cpu/x86/msr.h
+++ b/src/include/cpu/x86/msr.h
@@ -19,27 +19,27 @@ static void wrmsr(unsigned long index, msr_t msr)
typedef struct msr_struct
{
- unsigned lo;
- unsigned hi;
+ unsigned int lo;
+ unsigned int hi;
} msr_t;
typedef struct msrinit_struct
{
- unsigned index;
+ unsigned int index;
msr_t msr;
} msrinit_t;
#if IS_ENABLED(CONFIG_SOC_SETS_MSRS)
-msr_t soc_msr_read(unsigned index);
-void soc_msr_write(unsigned index, msr_t msr);
+msr_t soc_msr_read(unsigned int index);
+void soc_msr_write(unsigned int index, msr_t msr);
/* Handle MSR references in the other source code */
-static inline __attribute__((always_inline)) msr_t rdmsr(unsigned index)
+static inline __attribute__((always_inline)) msr_t rdmsr(unsigned int index)
{
return soc_msr_read(index);
}
-static inline __attribute__((always_inline)) void wrmsr(unsigned index, msr_t msr)
+static inline __attribute__((always_inline)) void wrmsr(unsigned int index, msr_t msr)
{
soc_msr_write(index, msr);
}
@@ -55,7 +55,7 @@ static inline __attribute__((always_inline)) void wrmsr(unsigned index, msr_t ms
* these functions to always be inlined by adding the qualifier
* __attribute__((always_inline)) to their declaration.
*/
-static inline __attribute__((always_inline)) msr_t rdmsr(unsigned index)
+static inline __attribute__((always_inline)) msr_t rdmsr(unsigned int index)
{
msr_t result;
__asm__ __volatile__ (
@@ -66,7 +66,7 @@ static inline __attribute__((always_inline)) msr_t rdmsr(unsigned index)
return result;
}
-static inline __attribute__((always_inline)) void wrmsr(unsigned index, msr_t msr)
+static inline __attribute__((always_inline)) void wrmsr(unsigned int index, msr_t msr)
{
__asm__ __volatile__ (
"wrmsr"
diff --git a/src/include/cpu/x86/mtrr.h b/src/include/cpu/x86/mtrr.h
index d9f38f57ee..fb8474a19d 100644
--- a/src/include/cpu/x86/mtrr.h
+++ b/src/include/cpu/x86/mtrr.h
@@ -87,7 +87,8 @@ void mtrr_use_temp_range(uintptr_t begin, size_t size, int type);
#endif
#if !defined(__ASSEMBLER__) && defined(__PRE_RAM__) && !defined(__ROMCC__)
-void set_var_mtrr(unsigned reg, unsigned base, unsigned size, unsigned type);
+void set_var_mtrr(unsigned int reg, unsigned int base, unsigned int size,
+ unsigned int type);
int get_free_var_mtrr(void);
#endif
diff --git a/src/include/cpu/x86/tsc.h b/src/include/cpu/x86/tsc.h
index e4ca0e768f..5a7fbc2007 100644
--- a/src/include/cpu/x86/tsc.h
+++ b/src/include/cpu/x86/tsc.h
@@ -12,8 +12,8 @@
#endif
struct tsc_struct {
- unsigned lo;
- unsigned hi;
+ unsigned int lo;
+ unsigned int hi;
};
typedef struct tsc_struct tsc_t;
generated by cgit v1.2.3 (git 2.25.1) at 2024-11-28 05:02:25 +0000