diff options
Diffstat (limited to 'src/include/cpu/x86/msr.h')
| -rw-r--r-- | src/include/cpu/x86/msr.h | 21 |
1 files changed, 20 insertions, 1 deletions
diff --git a/src/include/cpu/x86/msr.h b/src/include/cpu/x86/msr.h index 40926df602..d644eddc2a 100644 --- a/src/include/cpu/x86/msr.h +++ b/src/include/cpu/x86/msr.h @@ -29,6 +29,23 @@ typedef struct msrinit_struct msr_t msr; } msrinit_t; +#if IS_ENABLED(CONFIG_SOC_SETS_MSRS) +msr_t soc_msr_read(unsigned index); +void soc_msr_write(unsigned index, msr_t msr); + +/* Handle MSR references in the other source code */ +static inline __attribute__((always_inline)) msr_t rdmsr(unsigned index) +{ + return soc_msr_read(index); +} + +static inline __attribute__((always_inline)) void wrmsr(unsigned index, + msr_t msr) +{ + soc_msr_write(index, msr); +} +#else /* CONFIG_SOC_SETS_MSRS */ + /* The following functions require the always_inline due to AMD * function STOP_CAR_AND_CPU that disables cache as * ram, the cache as ram stack can no longer be used. Called @@ -50,7 +67,8 @@ static inline __attribute__((always_inline)) msr_t rdmsr(unsigned index) return result; } -static inline __attribute__((always_inline)) void wrmsr(unsigned index, msr_t msr) +static inline __attribute__((always_inline)) void wrmsr(unsigned index, + msr_t msr) { __asm__ __volatile__ ( "wrmsr" @@ -59,6 +77,7 @@ static inline __attribute__((always_inline)) void wrmsr(unsigned index, msr_t ms ); } +#endif /* CONFIG_SOC_SETS_MSRS */ #endif /* __ROMCC__ */ #endif /* CPU_X86_MSR_H */ |