4 files changed, 215 insertions, 0 deletions
diff --git a/src/drivers/intel/mipi_camera/Kconfig b/src/drivers/intel/mipi_camera/Kconfig
new file mode 100644
index 0000000000..d69a61ebb0
--- /dev/null
+++ b/src/drivers/intel/mipi_camera/Kconfig
@@ -0,0 +1,7 @@
+config DRIVERS_INTEL_MIPI_CAMERA
+	bool
+	depends on HAVE_ACPI_TABLES
+	default n
+	help
+	  MIPI CSI I2C camera SSDT generator. Generates SSDB and PWDB
+	  structures which are used by the Intel kernel drivers.
diff --git a/src/drivers/intel/mipi_camera/Makefile.inc b/src/drivers/intel/mipi_camera/Makefile.inc
new file mode 100644
index 0000000000..85f67b2606
--- /dev/null
+++ b/src/drivers/intel/mipi_camera/Makefile.inc
@@ -0,0 +1 @@
+ramstage-$(CONFIG_DRIVERS_INTEL_MIPI_CAMERA) += camera.c
diff --git a/src/drivers/intel/mipi_camera/camera.c b/src/drivers/intel/mipi_camera/camera.c
new file mode 100644
index 0000000000..7752f0aff3
--- /dev/null
+++ b/src/drivers/intel/mipi_camera/camera.c
@@ -0,0 +1,99 @@
+/*
+ * This file is part of the coreboot project.
+ *
+ * Copyright (C) 2017 Intel Corporation.
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; version 2 of the License.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ */
+
+#include <arch/acpi.h>
+#include <arch/acpi_device.h>
+#include <arch/acpigen.h>
+#include <console/console.h>
+#include <device/i2c.h>
+#include <device/device.h>
+#include <device/path.h>
+#include <string.h>
+#include "chip.h"
+
+static void camera_fill_ssdt(struct device *dev)
+{
+	struct drivers_intel_mipi_camera_config *config = dev->chip_info;
+	const char *scope = acpi_device_scope(dev);
+	struct acpi_i2c i2c = {
+		.address = dev->path.i2c.device,
+		.mode_10bit = dev->path.i2c.mode_10bit,
+		.speed = I2C_SPEED_FAST,
+		.resource = scope,
+	};
+
+	if (!dev->enabled || !scope)
+		return;
+
+	/* Device */
+	acpigen_write_scope(scope);
+	acpigen_write_device(acpi_device_name(dev));
+	acpigen_write_name_string("_HID", config->acpi_hid);
+	acpigen_write_name_integer("_UID", config->acpi_uid);
+	acpigen_write_name_string("_DDN", config->chip_name);
+	acpigen_write_STA(ACPI_STATUS_DEVICE_ALL_ON);
+
+	/* Resources */
+	acpigen_write_name("_CRS");
+	acpigen_write_resourcetemplate_header();
+	acpi_device_write_i2c(&i2c);
+	acpigen_write_resourcetemplate_footer();
+
+	/* Mark it as Camera related device */
+	acpigen_write_name_integer("CAMD", config->device_type);
+
+	/* Create Device specific data */
+	if (config->device_type == INTEL_ACPI_CAMERA_SENSOR) {
+		acpigen_write_method_serialized("SSDB", 0);
+		acpigen_write_return_byte_buffer((uint8_t *)&config->ssdb,
+						sizeof(config->ssdb));
+		acpigen_pop_len(); /* Method */
+	}
+
+	/* Fill Power Sequencing Data */
+	acpigen_write_method_serialized("PWDB", 0);
+	acpigen_write_return_byte_buffer((uint8_t *)&config->pwdb,
+			(sizeof(struct intel_pwdb) * config->num_pwdb_entries));
+	acpigen_pop_len(); /* Method */
+
+	acpigen_pop_len(); /* Device */
+	acpigen_pop_len(); /* Scope */
+	printk(BIOS_INFO, "%s: %s address 0%xh\n", acpi_device_path(dev),
+			dev->chip_ops->name, dev->path.i2c.device);
+}
+
+static const char *camera_acpi_name(struct device *dev)
+{
+	struct drivers_intel_mipi_camera_config *config = dev->chip_info;
+	return config->acpi_name;
+}
+
+static struct device_operations camera_ops = {
+	.read_resources			= DEVICE_NOOP,
+	.set_resources			= DEVICE_NOOP,
+	.enable_resources		= DEVICE_NOOP,
+	.acpi_name			= &camera_acpi_name,
+	.acpi_fill_ssdt_generator	= &camera_fill_ssdt,
+};
+
+static void camera_enable(struct device *dev)
+{
+	dev->ops = &camera_ops;
+}
+
+struct chip_operations drivers_intel_mipi_camera_ops = {
+	CHIP_NAME("Intel MIPI Camera Device")
+	.enable_dev = &camera_enable
+};
diff --git a/src/drivers/intel/mipi_camera/chip.h b/src/drivers/intel/mipi_camera/chip.h
new file mode 100644
index 0000000000..d4b8c02818
--- /dev/null
+++ b/src/drivers/intel/mipi_camera/chip.h
@@ -0,0 +1,108 @@
+/*
+ * This file is part of the coreboot project.
+ *
+ * Copyright (C) 2017 Intel Corporation.
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; version 2 of the License.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ */
+
+#ifndef __INTEL_MIPI_CAMERA_CHIP_H__
+#define __INTEL_MIPI_CAMERA_CHIP_H__
+
+#include <stdint.h>
+
+#define MAX_PWDB_ENTRIES 12
+
+enum intel_camera_device_type {
+	INTEL_ACPI_CAMERA_CIO2,
+	INTEL_ACPI_CAMERA_IMGU,
+	INTEL_ACPI_CAMERA_SENSOR,
+	INTEL_ACPI_CAMERA_VCM,
+	INTEL_ACPI_CAMERA_PMIC = 100,
+};
+
+enum intel_power_action_type {
+	INTEL_ACPI_CAMERA_REGULATOR,
+	INTEL_ACPI_CAMERA_CLK,
+	INTEL_ACPI_CAMERA_GPIO,
+};
+
+struct intel_ssdb {
+	uint8_t version;			/* Current version */
+	uint8_t sensor_card_sku;		/* CRD Board type */
+	uint8_t csi2_data_stream_interface[16];	/* CSI2 data stream GUID */
+	uint16_t bdf_value;			/* Bus number of the host
+						controller */
+	uint32_t dphy_link_en_fuses;		/* Host controller's fuses
+						information used to verify if
+						link is fused out or not */
+	uint32_t lanes_clock_division;		/* Lanes/clock divisions per
+						sensor */
+	uint8_t link_used;			/* Link used by this sensor
+						stream */
+	uint8_t lanes_used;			/* Number of lanes connected for
+						the sensor */
+	uint32_t csi_rx_dly_cnt_termen_clane;	/* MIPI timing information */
+	uint32_t csi_rx_dly_cnt_settle_clane;	/* MIPI timing information */
+	uint32_t csi_rx_dly_cnt_termen_dlane0;	/* MIPI timing information */
+	uint32_t csi_rx_dly_cnt_settle_dlane0;	/* MIPI timing information */
+	uint32_t csi_rx_dly_cnt_termen_dlane1;	/* MIPI timing information */
+	uint32_t csi_rx_dly_cnt_settle_dlane1;	/* MIPI timing information */
+	uint32_t csi_rx_dly_cnt_termen_dlane2;	/* MIPI timing information */
+	uint32_t csi_rx_dly_cnt_settle_dlane2;	/* MIPI timing information */
+	uint32_t csi_rx_dly_cnt_termen_dlane3;	/* MIPI timing information */
+	uint32_t csi_rx_dly_cnt_settle_dlane3;	/* MIPI timing information */
+	uint32_t max_lane_speed;		/* Maximum lane speed for
+						the sensor */
+	uint8_t sensor_cal_file_idx;		/* Legacy field for sensor
+						calibration file index */
+	uint8_t sensor_cal_file_idx_mbz[3];	/* Legacy field for sensor
+						calibration file index */
+	uint8_t rom_type;			/* NVM type of the camera
+						module */
+	uint8_t vcm_type;			/* VCM type of the camera
+						module */
+	uint8_t platform;			/* Platform information */
+	uint8_t platform_sub;			/* Platform sub-categories */
+	uint8_t flash_support;			/* Enable/disable flash
+						support */
+	uint8_t privacy_led;			/* Privacy LED support */
+	uint8_t degree;				/* Camera Orientation */
+	uint8_t mipi_define;			/* MIPI info defined in ACPI or
+						sensor driver */
+	uint32_t mclk;				/* Clock info for sensor */
+	uint8_t control_logic_id;		/* PMIC device node used for
+						the camera sensor */
+	uint8_t mipi_data_format;		/* MIPI data format */
+	uint8_t silicon_version;		/* Silicon version */
+	uint8_t customer_id;			/* Customer ID */
+} __attribute__((packed));
+
+struct intel_pwdb {
+	char name[32];		/* Name of the resource required by the power
+				action */
+	uint32_t value;		/* The value to be set for the power action */
+	uint32_t entry_type;	/* The type of the current power action */
+	uint32_t delay_usec;	/* The delay time after which power action is
+				performed and this is in unit of usec */
+} __attribute__((packed));
+
+struct drivers_intel_mipi_camera_config {
+	struct intel_ssdb ssdb;
+	struct intel_pwdb pwdb[MAX_PWDB_ENTRIES];
+	enum intel_camera_device_type device_type;
+	uint8_t num_pwdb_entries;
+	const char *acpi_hid;
+	const char *acpi_name;
+	const char *chip_name;
+	unsigned int acpi_uid;
+};
+
+#endif