diff options
Diffstat (limited to 'src/drivers')
-rw-r--r-- | src/drivers/intel/gma/i915.h | 27 | ||||
-rw-r--r-- | src/drivers/intel/gma/intel_dp.c | 83 |
2 files changed, 108 insertions, 2 deletions
diff --git a/src/drivers/intel/gma/i915.h b/src/drivers/intel/gma/i915.h index 9a6314e32b..ef770dc689 100644 --- a/src/drivers/intel/gma/i915.h +++ b/src/drivers/intel/gma/i915.h @@ -237,3 +237,30 @@ enum transcoder intel_ddi_get_transcoder(enum port port, void intel_dp_set_m_n_regs(struct intel_dp *intel_dp); void intel_dp_set_resolution(struct intel_dp *intel_dp); + +int intel_dp_i2c_write(struct intel_dp *intel_dp, + u8 val); + +int intel_dp_i2c_read(struct intel_dp *intel_dp, + u8 *val); + +int intel_dp_set_bw(struct intel_dp *intel_dp); +int intel_dp_set_lane_count(struct intel_dp *intel_dp); +int intel_dp_set_training_lane0(struct intel_dp *intel_dp, + u8 val); +int intel_dp_set_training_pattern(struct intel_dp *intel_dp, + u8 pat); + +int intel_dp_get_link_status(struct intel_dp *intel_dp, + uint8_t link_status[DP_LINK_STATUS_SIZE]); + +int intel_dp_get_training_pattern(struct intel_dp *intel_dp, + u8 *recv); + +int intel_dp_get_lane_count(struct intel_dp *intel_dp, + u8 *recv); + +int intel_dp_get_lane_align_status(struct intel_dp *intel_dp, + u8 *recv); + + diff --git a/src/drivers/intel/gma/intel_dp.c b/src/drivers/intel/gma/intel_dp.c index 419e49ed2d..b824cb7950 100644 --- a/src/drivers/intel/gma/intel_dp.c +++ b/src/drivers/intel/gma/intel_dp.c @@ -250,6 +250,40 @@ intel_dp_aux_native_write_1(struct intel_dp *intel_dp, return intel_dp_aux_native_write(intel_dp, address, &byte, 1); } +int intel_dp_set_bw(struct intel_dp *intel_dp) +{ + printk(BIOS_SPEW, "DP_LINK_BW_SET"); + return intel_dp_aux_native_write_1(intel_dp, + DP_LINK_BW_SET, + intel_dp->link_bw); +} + +int intel_dp_set_lane_count(struct intel_dp *intel_dp) +{ + printk(BIOS_SPEW, "DP_LANE_COUNT_SET"); + return intel_dp_aux_native_write_1(intel_dp, + DP_LANE_COUNT_SET, + intel_dp->lane_count); +} + +int intel_dp_set_training_pattern(struct intel_dp *intel_dp, + u8 pat) +{ + printk(BIOS_SPEW, "DP_TRAINING_PATTERN_SET"); + return intel_dp_aux_native_write_1(intel_dp, + DP_TRAINING_PATTERN_SET, + pat); +} + +int intel_dp_set_training_lane0(struct intel_dp *intel_dp, + u8 val) +{ + printk(BIOS_SPEW, "DP_TRAINING_LANE0_SET"); + return intel_dp_aux_native_write_1(intel_dp, + DP_TRAINING_LANE0_SET, + val); +} + /* read bytes from a native aux channel */ static int intel_dp_aux_native_read(struct intel_dp *intel_dp, @@ -381,6 +415,24 @@ intel_dp_i2c_aux_ch(struct intel_dp *intel_dp, return -1; } +int intel_dp_i2c_write(struct intel_dp *intel_dp, + u8 val) +{ + return intel_dp_i2c_aux_ch(intel_dp, + MODE_I2C_WRITE, + val, + NULL); +} + +int intel_dp_i2c_read(struct intel_dp *intel_dp, + u8 *val) +{ + return intel_dp_i2c_aux_ch(intel_dp, + MODE_I2C_READ, + 0, + val); +} + int intel_dp_i2c_init(struct intel_dp *intel_dp) { @@ -990,7 +1042,7 @@ intel_dp_aux_native_read_retry(struct intel_dp *intel_dp, uint16_t address, * Fetch AUX CH registers 0x202 - 0x207 which contain * link status information */ -static int +int intel_dp_get_link_status(struct intel_dp *intel_dp, uint8_t link_status[DP_LINK_STATUS_SIZE]) { @@ -1728,7 +1780,7 @@ int intel_dp_get_max_downspread(struct intel_dp *intel_dp, u8 *max_downspread) { int got, want = 1; - got = intel_dp_aux_native_read_retry(intel_dp, 0x000, max_downspread, + got = intel_dp_aux_native_read_retry(intel_dp, DP_MAX_DOWNSPREAD, max_downspread, want); if (got < want) { printk(BIOS_SPEW, "%s: got %d, wanted %d\n", __func__, got, want); @@ -1761,3 +1813,30 @@ void intel_dp_set_resolution(struct intel_dp *intel_dp) io_i915_write32(intel_dp->vblank, VBLANK(intel_dp->transcoder)); io_i915_write32(intel_dp->vsync, VSYNC(intel_dp->transcoder)); } + +int intel_dp_get_training_pattern(struct intel_dp *intel_dp, + u8 *recv) +{ + return intel_dp_aux_native_read_retry(intel_dp, + DP_TRAINING_PATTERN_SET, + recv, + 0); +} + +int intel_dp_get_lane_count(struct intel_dp *intel_dp, + u8 *recv) +{ + return intel_dp_aux_native_read_retry(intel_dp, + DP_LANE_COUNT_SET, + recv, + 0); +} + +int intel_dp_get_lane_align_status(struct intel_dp *intel_dp, + u8 *recv) +{ + return intel_dp_aux_native_read_retry(intel_dp, + DP_LANE_ALIGN_STATUS_UPDATED, + recv, + 0); +} |