4 files changed, 7 insertions, 8 deletions
diff --git a/src/drivers/intel/fsp1_1/include/fsp/ramstage.h b/src/drivers/intel/fsp1_1/include/fsp/ramstage.h
index dec23938d1..d1b803e363 100644
--- a/src/drivers/intel/fsp1_1/include/fsp/ramstage.h
+++ b/src/drivers/intel/fsp1_1/include/fsp/ramstage.h
@@ -8,7 +8,6 @@
 
 /* Perform Intel silicon init. */
 void intel_silicon_init(void);
-void fsp_run_silicon_init(FSP_INFO_HEADER *fsp_info_header, int is_s3_wakeup);
 /* Called after the silicon init code has run. */
 void soc_after_silicon_init(void);
 /* Initialize UPD data before SiliconInit call. */
diff --git a/src/drivers/intel/fsp1_1/ramstage.c b/src/drivers/intel/fsp1_1/ramstage.c
index 34eec6e433..22d4f1c8be 100644
--- a/src/drivers/intel/fsp1_1/ramstage.c
+++ b/src/drivers/intel/fsp1_1/ramstage.c
@@ -51,7 +51,7 @@ static void display_hob_info(FSP_INFO_HEADER *fsp_info_header)
 	}
 }
 
-void fsp_run_silicon_init(FSP_INFO_HEADER *fsp_info_header, int is_s3_wakeup)
+static void fsp_run_silicon_init(FSP_INFO_HEADER *fsp_info_header)
 {
 	FSP_SILICON_INIT fsp_silicon_init;
 	SILICON_INIT_UPD *original_params;
@@ -179,7 +179,7 @@ static void fsp_load(void)
 void intel_silicon_init(void)
 {
 	fsp_load();
-	fsp_run_silicon_init(fsp_get_fih(), acpi_is_wakeup_s3());
+	fsp_run_silicon_init(fsp_get_fih());
 }
 
 /* Initialize the UPD parameters for SiliconInit */
diff --git a/src/drivers/intel/fsp2_0/include/fsp/api.h b/src/drivers/intel/fsp2_0/include/fsp/api.h
index 63018c58db..8561600714 100644
--- a/src/drivers/intel/fsp2_0/include/fsp/api.h
+++ b/src/drivers/intel/fsp2_0/include/fsp/api.h
@@ -33,7 +33,7 @@ enum fsp_notify_phase {
 
 /* Main FSP stages */
 void fsp_memory_init(bool s3wake);
-void fsp_silicon_init(bool s3wake);
+void fsp_silicon_init(void);
 void fsp_temp_ram_exit(void);
 
 /*
@@ -41,7 +41,7 @@ void fsp_temp_ram_exit(void);
  * separately from calling silicon init. It might be required in cases where
  * stage cache is no longer available by the point SoC calls into silicon init.
  */
-void fsps_load(bool s3wake);
+void fsps_load(void);
 
 /* Callbacks for updating stage-specific parameters */
 void platform_fsp_memory_init_params_cb(FSPM_UPD *mupd, uint32_t version);
diff --git a/src/drivers/intel/fsp2_0/silicon_init.c b/src/drivers/intel/fsp2_0/silicon_init.c
index 270a872965..6a2a73dbb9 100644
--- a/src/drivers/intel/fsp2_0/silicon_init.c
+++ b/src/drivers/intel/fsp2_0/silicon_init.c
@@ -191,7 +191,7 @@ static int fsps_get_dest(const struct fsp_load_descriptor *fspld, void **dest,
 	return 0;
 }
 
-void fsps_load(bool s3wake)
+void fsps_load(void)
 {
 	struct fsp_load_descriptor fspld = {
 		.fsp_prog = PROG_INIT(PROG_REFCODE, CONFIG_FSP_S_CBFS),
@@ -220,9 +220,9 @@ void fsps_load(bool s3wake)
 	load_done = 1;
 }
 
-void fsp_silicon_init(bool s3wake)
+void fsp_silicon_init(void)
 {
-	fsps_load(s3wake);
+	fsps_load();
 	do_silicon_init(&fsps_hdr);
 }